R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 320

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 10 Bus Monitor
10.1.4
SYCBESW controls the notification of various types of bus errors to the CPU.
Page 292 of 1190
Bit
31
30
29
28
27 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bus Error Control Register (SYCBESW)
Bit Name
00CPEN
01CPEN
⎯
11CPEN
⎯
CPEN
R/W
31
00
15
—
R
0
0
CPEN
R/W
30
14
—
01
R
0
0
29
—
13
—
R
R
0
0
Initial
Value
0
0
0
0
All 0
CPEN
R/W
28
11
12
—
R
0
0
27
11
—
—
R
R
0
0
R/W
R/W
R/W
R
R/W
R
26
10
—
—
R
R
0
0
Description
Bus Error Control (CPU → CPU)
This bit controls notification to the CPU when a bus
error is caused by the CPU.
0: Not notified
1: Notified
Bus Error Control (DMAC Destination Side → CPU)
This bit controls notification to the CPU when a bus
error is caused by the DMAC destination side.
0: Not notified
1: Notified
Reserved
This bit is always read as 0. The write value should
always be 0.
Bus Error Control (DMAC Source Side → CPU)
This bit controls notification to the CPU when a bus
error is caused by the DMAC source side.
0: Not notified
1: Notified
Reserved
These bits are always read as 0. The write value
should always be 0.
25
—
—
R
R
0
9
0
24
—
—
R
R
0
8
0
23
—
—
R
R
0
7
0
22
—
—
R
R
0
6
0
21
—
—
R
R
0
5
0
20
—
—
R
R
0
4
0
R01UH0026EJ0300 Rev. 3.00
19
—
—
R
R
0
3
0
18
—
—
R
R
0
2
0
SH7201 Group
17
Sep 24, 2010
—
—
R
R
0
1
0
16
—
—
R
R
0
0
0