R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 357

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
16
15 to 9
Bit Name
DREQ
⎯
Initial
Value
0
All 0
R/W
R/W
R
Description
(c) When a source other than the software trigger is
•
•
Notes: 1. In a case where a source other than
0: No DMA request
1: DMA requested
Reserved
These bits are always read as 0. The write value
should always be 0.
selected (DCTG = "000000") by the DMA request
source selection bits (DCTG) and an edge sense
has been selected
Condition for setting to "1"
The DREQ bit is set to "1" when the edge specified
by the input sense selection bits (STRG) is
encountered, i.e. when a DMA request exists.
Once this bit has been set to "1", regardless of the
subsequent state of the DMA request signal, the
DMA request bit (DREQ) remains set until a
condition for clearing to "0" has been satisfied.
Condition for clearing to "0"
This bit is cleared to "0" by either of the events
listed below.
⎯ Software writing a "0" to this bit
⎯ The start of operand transfer corresponding to
the bit
2. After setting the DMA request source
software triggering is selected, do not write
"1" to the DMA request bit (DREQ). If "1" is
written to this bit, operation is not
guaranteed.
selection bits (DCTG) and the input sense
mode selection bits (STRG) in DMA control
register A (DMCNTAn), be sure to clear the
DMA request bit (DREQ) for the channel to
"0" and enable DMA transfer (DMST = "1"
and DEN = "1").
Section 11 Direct Memory Access Controller (DMAC)
Page 329 of 1190