R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 415

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R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SH7201 Group
12.3.3
The TIOR registers are 8-bit readable/writable registers that control the TGR registers. The MTU2
has a total of eleven TIOR registers, two each for channels 0, 3, and 4, one each for channels 1 and
2, and three (TIORU_5, TIORV_5, and TIORW_5) for channel 5.
TIOR should be set while TMDR is set in normal operation, PWM mode, or phase counting mode.
The initial output specified by TIOR is valid when the counter is stopped (the CST bit in TSTR is
cleared to 0). Note also that, in PWM mode 2, the output at the point at which the counter is
cleared to 0 is specified.
When TGRC or TGRD is designated for buffer operation, this setting is invalid and the register
operates as a buffer register.
• TIORH_0, TIOR_1, TIOR_2, TIORH_3, TIORH_4
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
7 to 4
3 to 0
Bit Name
IOB[3:0]
IOA[3:0]
Timer I/O Control Register (TIOR)
Initial value:
Initial
Value
0000
0000
R/W:
Bit:
R/W
R/W
R/W
R/W
7
0
R/W
6
0
IOB[3:0]
Description
I/O Control B0 to B3
Specify the function of TGRB.
See the following tables.
TIORH_0: Table 12.12
TIOR_1:
TIOR_2:
TIORH_3: Table 12.16
TIORH_4: Table 12.18
I/O Control A0 to A3
Specify the function of TGRA.
See the following tables.
TIORH_0: Table 12.20
TIOR_1:
TIOR_2:
TIORH_3: Table 12.24
TIORH_4: Table 12.26
R/W
5
0
R/W
4
0
Table 12.14
Table 12.15
Table 12.22
Table 12.23
R/W
3
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
R/W
2
0
IOA[3:0]
R/W
1
0
R/W
0
0
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