R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 741

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SH7201 Group
In serial transmission, the SCIF operates as described below.
1. When data is written into the transmit FIFO data register (SCFTDR), the SCIF transfers the
2. When data is transferred from SCFTDR to SCTSR and transmission is started, consecutive
3. The SCIF checks the SCFTDR transmit data at the timing for sending the stop bit. If data is
Figure 16.5 shows an example of the operation for transmission.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
data from SCFTDR to the transmit shift register (SCTSR) and starts transmitting. Confirm that
the TDFE flag in the serial status register (SCFSR) is set to 1 before writing transmit data to
SCFTDR. The number of data bytes that can be written is (16 – transmit trigger setting).
transmit operations are performed until there is no transmit data left in SCFTDR. When the
number of transmit data bytes in SCFTDR falls below the transmit trigger number set in the
FIFO control register (SCFCR), the TDFE flag is set. If the TIE bit in the serial control register
(SCSR) is set to 1 at this time, a transmit-FIFO-data-empty interrupt (TXI) request is
generated.
The serial transmit data is sent from the TxD pin in the following order.
A. Start bit: One-bit 0 is output.
B. Transmit data: 8-bit or 7-bit data is output in LSB-first order.
C. Parity bit: One parity bit (even or odd parity) is output. (A format in which a parity bit is
D. Stop bit(s): One or two 1 bits (stop bits) are output.
E. Mark state: 1 is output continuously until the start bit that starts the next transmission is
present, the data is transferred from SCFTDR to SCTSR, the stop bit is sent, and then serial
transmission of the next frame is started.
TDFE
TEND
Serial
data
not output can also be selected.)
sent.
Figure 16.5 Example of Transmit Operation (8-Bit Data, Parity, 1 Stop Bit)
TXI interrupt
request
1
Start
bit
0
Data written to SCFTDR and TDFE
flag read as 1 then cleared to 0 by
TXI interrupt handler
D 0
One frame
D 1
Data
D 7
Parity
bit
0/1
Stop
TXI interrupt
request
bit
1
Section 16 Serial Communication Interface with FIFO (SCIF)
Start
bit
0
D 0
D 1
Data
Parity
D 7
bit
Stop
0/1
bit
1
Idle state
(mark state)
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