R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 762

no-image

R0K572011S000BE

Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr

Specifications of R0K572011S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 17 I
Page 734 of 1190
Bit
5
4
3 to 0
2
C Bus Interface 3 (IIC3)
Bit Name
MST
TRS
CKS[3:0]
Initial
Value
0
0
0000
R/W
R/W
R/W
R/W
Description
Master/Slave Select
Transmit/Receive Select
In master mode with the I
arbitration is lost, MST and TRS are both reset by
hardware, causing a transition to slave receive mode.
Modification of the TRS bit should be made between
transfer frames.
When seven bits after the start condition is issued in
slave receive mode match the slave address set to
SAR and the 8th bit is set to 1, TRS is automatically
set to 1. If an overrun error occurs in master receive
mode with the clocked synchronous serial format, MST
is cleared and the mode changes to slave receive
mode.
Operating modes are described below according to
MST and TRS combination. When clocked
synchronous serial format is selected and MST = 1,
clock is output.
00: Slave receive mode
01: Slave transmit mode
10: Master receive mode
11: Master transmit mode
Transfer Clock Select
These bits should be set according to the necessary
transfer rate (table 17.3) in master mode.
2
C bus format, when
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010

Related parts for R0K572011S000BE