R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 865

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

SH7201 Group
• Requirements of Bit Configuration Register
SYNC_SEG:
edge transitions occur in this segment.)
PRSEG:
PHSEG1:
PHSEG2:
TSEG1:
TSEG2:
The RCAN-ET Bit Rate Calculation is:
where BRP is given by the register value and TSEG1 and TSEG2 are derived values from TSG1
and TSG2 register values.
BCR Setting Constraints
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit Rate =
f
TSEG1min > TSEG2 ≥ SJWmax
8 ≤ TSEG1 + TSEG2 + 1 ≤ 25 time quanta (TSEG1 + TSEG2 + 1 = 7 is not allowed)
TSEG2 ≥ 2
CLK
= Peripheral Clock
Segment for compensating for physical delay between networks.
Buffer segment for correcting phase drift (positive). (This segment is extended
Buffer segment for correcting phase drift (negative). (This segment is shortened
TSG1 + 1
TSG2 + 1
when synchronisation (resynchronisation) is established.)
when synchronisation (resynchronisation) is established)
Segment for establishing synchronisation of nodes on the CAN bus. (Normal bit
SYNC_SEG
2
(BRP + 1)
1
1-bit time (8 to 25 quanta)
PRSEG
(TSEG1
f
clk
TSEG1
4-16
(SJW = 1 to 4)
TSEG2
PHSEG1
1)
Section 19 Controller Area Network (RCAN-ET)
TSEG2
2-8
Quantum
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