E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 166
E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 166 of 1093
- Download datasheet (6Mb)
Section 6 Bus Controller
6.2.2
ASTCR is an 8-bit readable/writable register that designates each area as either a 2-state access
space or a 3-state access space.
ASTCR sets the number of access states for the external memory space. The number of access
states for on-chip memory and internal I/O registers is fixed regardless of the settings in ASTCR.
In normal mode, the settings of bits AST7 to AST1 have no effect on operation.
ASTCR is initialized to H'FF by a power-on reset and in hardware standby mode. It is not
initialized by a manual reset or in software standby mode.
Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the
corresponding area is to be designated as a 2-state access space or a 3-state access space. In
normal mode, only part of area 0 is enabled, and the AST0 bit selects whether external space is to
be designated for 2-state access or 3-state access.
Wait state insertion is enabled or disabled at the same time.
Bit n
ASTn
0
1
Note: n = 7 to 0
Rev. 5.00 Sep 14, 2006 page 136 of 1060
REJ09B0331-05000
Bit
Initial value
R/W
Access State Control Register (ASTCR)
Description
Area n is designated for 2-state access
Wait state insertion in area n external space is disabled
Area n is designated for 3-state access
Wait state insertion in area n external space is enabled
:
:
:
AST7
R/W
7
1
AST6
R/W
6
1
AST5
R/W
5
1
AST4
R/W
4
1
AST3
R/W
3
1
AST2
R/W
2
1
AST1
R/W
1
1
(Initial value)
AST0
R/W
0
1
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