E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 204

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 6 Bus Controller
6.5.6
Figure 6.15 shows the basic access timing for DRAM space. The basic DRAM access timing is 4
states. Unlike the basic bus interface, the corresponding bits in ASTCR control only enabling or
disabling of wait insertion, and do not affect the number of access states. When the corresponding
bit in ASTCR is cleared to 0, wait states cannot be inserted in the DRAM access cycle.
The 4 states of the basic timing consist of one T
output cycle), and two T
Rev. 5.00 Sep 14, 2006 page 174 of 1060
REJ09B0331-05000
Read
Write
Note: n = 2 to 5
Basic Timing
HWR, LWR
HWR, LWR
(UWE, LWE)
(UWE, LWE)
CS
D
D
A
n
15
15
23
(RAS)
to D
to D
to A
CAS
Figure 6.15 Basic Access Timing (2-WE System)
c
0
0
0
(column address output cycle) states, T
T
p
p
(precharge cycle) state, one T
Row
T
r
T
c1
c1
and T
Column
c2
.
T
r
c2
(row address