E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 294
E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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- Download datasheet (6Mb)
Section 7 DMA Controller
7.5.4
Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit to
0. In repeat mode, MAR is updated after each byte or word transfer in response to a single transfer
request, and this is executed the number of times specified in ETCR. On completion of the
specified number of transfers, MAR and ETCRL are automatically restored to their original
settings and operation continues.
One address is specified by MAR, and the other by IOAR. The transfer direction can be specified
by the DTDIR bit in DMACR.
Table 7.8 summarizes register functions in repeat mode.
Table 7.8
Register
Legend:
MAR
IOAR : I/O address register
ETCR : Transfer count register
DTDIR : Data transfer direction bit
Rev. 5.00 Sep 14, 2006 page 264 of 1060
REJ09B0331-0500
23
23
H'FF
: Memory address register
Repeat Mode
15
Register Functions in Repeat Mode
MAR
IOAR
7
7
ETCRH
ETCRL
0
0
0
0
DTDIR = 0
Source
address
register
Destination
address
register
Holds number
of transfers
Transfer counter
Function
DTDIR = 1
Destination
address
register
Source
address
register
Initial Setting
Start address of
transfer destination
or transfer source
Start address of
transfer source or
transfer destination
Number of
transfers
Number of
transfers
Operation
Incremented/
decremented
every transfer.
Initial setting is
restored when
value reaches
H'0000
Fixed
Fixed
Decremented
every transfer.
Loaded with
ETCRH value
when count
reaches H'00
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