E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 312

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 7 DMA Controller
Activation by Auto-Request
Auto-request activation is performed by register setting only, and transfer continues to the end.
With auto-request activation, cycle steal mode or burst mode can be selected.
In cycle steal mode, the DMAC releases the bus to another bus master each time a byte or word is
transferred. DMA and CPU cycles usually alternate.
In burst mode, the DMAC keeps possession of the bus until the end of the transfer, and transfer is
performed continuously.
Single Address Mode
The DMAC can operate in dual address mode in which read cycles and write cycles are separate
cycles, or single address mode in which read and write cycles are executed in parallel.
In dual address mode, transfer is performed with the source address and destination address
specified separately.
In single address mode, on the other hand, transfer is performed between external space in which
either the transfer source or the transfer destination is specified by an address, and an external
device for which selection is performed by means of the DACK strobe, without regard to the
address. Figure 7.17 shows the data bus in single address mode.
Rev. 5.00 Sep 14, 2006 page 282 of 1060
REJ09B0331-0500
Figure 7.17 Data Bus in Single Address Mode
(high impedance)
H8S/2655
HWR, LWR
D
A
23
15
DACK
to D
to A
RD
0
0
Address bus
(Read)
(Write)
External
External
memory
device