E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 337

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 7.40 shows an example in which a low level is not output at the TEND pin.
Activation by Falling Edge on DREQ
DREQ pin falling edge detection is performed in synchronization with DMAC internal operations.
The operation is as follows:
[1] Activation request wait state: Waits for detection of a low level on the DREQ pin, and
[2] Transfer wait state: Waits for DMAC data transfer to become possible, and switches to [3].
[3] Activation request disabled state: Waits for detection of a high level on the DREQ pin, and
After DMAC transfer is enabled, a transition is made to [1]. Thus, initial activation after transfer is
enabled is performed by detection of a low level.
switches to [2].
switches to [1].
Internal write signal
Internal read signal
External address
Figure 7.40 Example in Which Low Level Is Not Output at TEND
Internal address
HWR, LWR
TEND
DREQ Pin
DREQ
DREQ
External write by CPU, etc.
Not output
DMA
read
Rev. 5.00 Sep 14, 2006 page 307 of 1060
DMA
write
Section 7 DMA Controller
TEND
TEND
TEND Pin
REJ09B0331-0500

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