E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 351

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 8.2
8.3.2
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 8.3 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Transfer Mode
Normal mode
Repeat mode
Block transfer mode
One transfer request transfers one byte
or one word
Memory addresses are incremented or
decremented by 1 or 2
Up to 65,536 transfers possible
One transfer request transfers one byte
or one word
Memory addresses are incremented or
decremented by 1 or 2
After the specified number of transfers
(1 to 256), the initial state resumes and
operation continues
One transfer request transfers a block
of the specified size
Block size is from 1 to 256 bytes or
words
Up to 65,536 transfers possible
A block area can be designated at
either the source or destination
Activation Sources
DTC Functions
Activation Source
IRQ
TPU TGI
8-bit timer CMI
SCI TXI or RXI
A/D converter ADI
DMAC DEND
Software
Rev. 5.00 Sep 14, 2006 page 321 of 1060
Section 8 Data Transfer Controller
Address Registers
Transfer
Source
24 bits
REJ09B0331-0500
Transfer
Destination
24 bits

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