E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 486

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E62655RUSB

Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of E62655RUSB

Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 10 16-Bit Timer Pulse Unit (TPU)
10.2.4
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has six TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
0
1
Bit 6—Reserved: Read-only bit, always read as 1.
Rev. 5.00 Sep 14, 2006 page 456 of 1060
REJ09B0331-0500
Channel 0: TIER0
Channel 3: TIER3
Bit
Initial value
R/W
Channel 1: TIER1
Channel 2: TIER2
Channel 4: TIER4
Channel 5: TIER5
Bit
Initial value
R/W
Timer Interrupt Enable Register (TIER)
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
:
:
:
:
:
:
TTGE
TTGE
R/W
R/W
7
0
7
0
6
1
6
1
TCIEU
R/W
5
0
5
0
TCIEV
TCIEV
R/W
R/W
4
0
4
0
TGIED
R/W
3
0
3
0
TGIEC
R/W
2
0
2
0
TGIEB
TGIEB
R/W
R/W
1
0
1
0
(Initial value)
TGIEA
TGIEA
R/W
R/W
0
0
0
0

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