E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 602

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 13 Watchdog Timer
13.2
13.2.1
TCNT is an 8-bit readable/writable * up-counter.
When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal
clock source selected by bits CKS2 to CKS0 in TCSR. When the count overflows (changes from
H'FF to H'00), either the watchdog timer overflow signal (WDTOVF) or an interval timer interrupt
(WOVI) is generated, depending on the mode selected by the WT/IT bit in TCSR.
TCNT is initialized to H'00 by a reset, in hardware standby mode, or when the TME bit is cleared
to 0. It is not initialized in software standby mode.
Note: * The method for writing to TCNT is different from that for general registers to prevent
13.2.2
TCSR is an 8-bit readable/writable * register. Its functions include selecting the clock source to be
input to TCNT, and the timer mode.
TCR is initialized to H'18 by a reset and in hardware standby mode. It is not initialized in software
standby mode.
Note: * The method for writing to TCSR is different from that for general registers to prevent
Rev. 5.00 Sep 14, 2006 page 572 of 1060
REJ09B0331-0500
Bit
Initial value
R/W
Bit
Initial value
R/W
Note: * Can only be written with 0 for flag clearing.
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
inadvertent overwriting. For details see section 13.2.4, Notes on Register Access.
inadvertent overwriting. For details see section 13.2.4, Notes on Register Access.
:
:
:
:
:
:
R/(W) *
OVF
R/W
7
0
7
0
WT/IT
R/W
R/W
6
0
6
0
TME
R/W
R/W
5
0
5
0
R/W
—
—
4
0
4
1
R/W
—
—
3
0
3
1
CKS2
R/W
R/W
2
0
2
0
CKS1
R/W
R/W
1
0
1
0
CKS0
R/W
R/W
0
0
0
0