E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 70
E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 70 of 1093
- Download datasheet (6Mb)
Section 2 CPU
2.6
2.6.1
The H8S/2600 CPU has 69 types of instructions. The instructions are classified by function in
table 2.1.
Table 2.1
Function
Data transfer
Arithmetic
operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer
Legend: B: Byte
Notes: 1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn,
Rev. 5.00 Sep 14, 2006 page 40 of 1060
REJ09B0331-0500
2. Bcc is the general name for conditional branch instructions.
W: Word
L: Longword
Instruction Set
Overview
@-SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and
MOV.L ERn, @-SP.
Instruction Classification
Instructions
MOV
POP *
LDM, STM
MOVFPE, MOVTPE
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS
MAC, LDMAC, STMAC, CLRMAC
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR BWL
BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST, BAND,
BIAND, BOR, BIOR, BXOR, BIXOR
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP —
EEPMOV
Bcc *
2
, JMP, BSR, JSR, RTS
1
, PUSH *
1
Size
BWL
WL
L
B
B
BWL
L
BW
WL
B
—
BWL
B
—
—
BWL
Types
5
23
4
8
14
5
9
1
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