8.13.00 J-TRACE FOR CORTEX-M3 Segger Microcontroller Systems, 8.13.00 J-TRACE FOR CORTEX-M3 Datasheet - Page 133

• Manufacturer Part Number: 8.13.00 J-TRACE FOR CORTEX-M3
• Description: EMULATOR JTAG/SWD CORTEX M3
• Manufacturer: Segger Microcontroller Systems
• Type: Emulatorr

Specifications of 8.13.00 J-TRACE FOR CORTEX-M3

• Contents: Emulation Module
• For Use With/related Products: ARM7, ARM9, Cortex
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.11.1.7 map indirectread
J-Link / J-Trace (UM08001)
Syntax
map exclude <SAddr>-<EAddr>
Example
This is an example for the map
LPC2148 MCU.
Memory map
The "problematic" memory areas are:
To exclude these areas from being accessed through J-Link the map exclude com-
mand should be used as follows:
map exclude 0x00080000-0x3FFFFFFF
map exclude 0x40008000-0x7FCFFFFF
map exclude 0x7FD02000-0x7FD02000
map exclude 0x80000000-0xDFFFFFFF
This command can be used to read a memory area indirectly. Indirectly reading
means that a small code snippet is downloaded into RAM of the target device, which
reads and transfers the data of the specified memory area to the host. Before map
indirectread can be called a RAM area for the indirectly read code snippet has to be
defined. Use therefor the map ram command and define a RAM area with a size of >=
256 byte.
Typical applications
Refer to chapter Fast GPIO bug on page 163 for an example.
Syntax
map indirectread <StartAddressOfArea>-<EndAddress>
Example
map indirectread 0x3fffc000-0x3fffcfff
0x00000000-0x0007FFFF
0x00080000-0x3FFFFFFF
0x40000000-0x40007FFF
0x40008000-0x7FCFFFFF
0x7FD00000-0x7FD01FFF
0x7FD02000-0x7FD02000
0x7FFFD000-0x7FFFFFFF
0x80000000-0xDFFFFFFF
0xE0000000-0xEFFFFFFF
0xF0000000-0xFFFFFFFF
0x00080000-0x3FFFFFFF
0x40008000-0x7FCFFFFF
0x7FD02000-0x7FD02000
0x80000000-0xDFFFFFFF
On-chip flash memory
Reserved
On-chip SRAM
Reserved
On-chip USB DMA RAM
Reserved
Boot block (remapped from on-chip flash memory)
Reserved
VPB peripherals
AHB peripherals
Reserved
Reserved
Reserved
Reserved
exclude command in combination with an NXP
© 2004-2011 SEGGER Microcontroller GmbH & Co. KG
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