STEVAL-IFS001V1 STMicroelectronics, STEVAL-IFS001V1 Datasheet - Page 17

EVAL BOARD 3AXIS MEMS ACCELLRMTR

STEVAL-IFS001V1

Manufacturer Part Number
STEVAL-IFS001V1
Description
EVAL BOARD 3AXIS MEMS ACCELLRMTR
Manufacturer
STMicroelectronics
Series
MEMSr

Specifications of STEVAL-IFS001V1

Design Resources
STEVAL-IFS001V1 Gerber Files STEVAL-IFS001V1 Schematic STEVAL-IFS001V1 Bill of Material
Sensor Type
Accelerometer, 3 Axis
Sensing Range
±2g, 6g
Interface
I²C, SPI
Sensitivity
1024 LSb/g
Voltage - Supply
2.16 V ~ 3.6 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
LIS3LV02DQ
Processor To Be Evaluated
LIS3LV02DQ
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-5069

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Part Number:
STEVAL-IFS001V1
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0
LIS3LV02DQ
5
5.1
Digital Interfaces
The registers embedded inside the LIS3LV02DQ may be accessed through both the I
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I
line must be tied high (i.e connected to Vdd_IO).
Table 6.
I
The LIS3LV02DQ I
whose content can also be read back.
The relevant I
Table 7.
There are two signals associated with the I
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data to/from
the interface. Both the lines are connected to Vdd_IO through a pull-up resistor embedded
inside the LIS3LV02DQ. When the bus is free both the lines are high.
The I
Mode.
2
C Serial Interface
SDA/SDI/SDO
Transmitter
PIN Name
SCL/SPC
2
Receiver
C interface is compliant with Fast Mode (400 kHz) I
Master
Term
Slave
SDO
CS
Serial interface pin description
Serial interface pin description
2
C terminology is given in the table below
2
SPI enable
I
I
SPI Serial Port Clock (SPC)
I
SPI Serial Data Input (SDI)
3-wire Interface Serial Data Output (SDO)
SPI Serial Data Output (SDO)
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
C is a bus slave. The I
2
2
2
C/SPI mode selection (1: I
C Serial Clock (SCL)
C Serial Data (SDA)
CD00047926
2
2
C is employed to write the data into the registers
C bus: the Serial Clock Line (SCL) and the Serial
2
C mode; 0: SPI enabled)
PIN Description
Description
2
C standards as well as the Normal
2
C interface, CS
5 Digital Interfaces
2
C and
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