MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 145

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.9.4 Time Base Facility (TB) — OEA
TB — Time Base (Write Only)
3.9.5 Decrementer Register (DEC)
MPC555
USER’S MANUAL
32:63
0
0:31
Bits
As described in
provides a 64-bit incrementing counter. The VEA defines user-level, read-only access
to the TB. Writing to the TB is reserved for supervisor-level applications such as oper-
ating systems and bootstrap routines. The OEA defines supervisor-level, write access
to the TB.
The TB can be written to at the supervisor privilege level only. The mttbl and mttbu
simplified mnemonics write the lower and upper halves of the TB, respectively. The
mtspr, mttbl, and mttbu instructions treat TBL and TBU as separate 32-bit registers;
setting one leaves the other unchanged. It is not possible to write the entire 64-bit time
base in a single instruction.
For information about reading the time base, refer to
— Time
The decrementer (DEC, SPR 22) is a 32-bit decrementing counter defined by the
MPC555 / MPC556 to provide a decrementer exception after a programmable delay.
The DEC satisfies the following requirements:
The decrementer frequency is based on a subdivision of the processor clock. A bit in
the system clock control register (SCCR) in the SIU determines the clock source of
both the decrementer and the time base. For details on the decrementer and time base
• Loading a GPR from the DEC has no effect on the DEC.
• Storing a GPR to the DEC replaces the value in the DEC with the value in the
• Whenever bit 0 of the DEC changes from zero to one, a decrementer exception
• If the DEC is altered by software and the content of bit 0 is changed from zero to
• PORESET resets and stops the decrementer, HRESET/SRESET do not.
Name
/
GPR.
request (unless masked) is signaled. Multiple DEC exception requests may be re-
ceived before the first exception occurs; however, any additional requests are
canceled when the exception occurs for the first request.
one, an exception request is signaled.
TBU
TBL
MPC556
Base.
Time Base (Upper) — The high-order 32 bits of the time base
Time Base (Lower) — The low-order 32 bits of the time base
Table 3-14 Time Base Field Definitions (Write Only)
3.8 PowerPC VEA Register Set — Time
TBU
CENTRAL PROCESSING UNIT
Rev. 15 October 2000
RESET: UNCHANGED
31 32
Description
3.8 PowerPC VEA Register Set
Base, the time base (TB)
TBL
SPR 284, 285
MOTOROLA
3-23
63

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