MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 40

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Page
Table
Number
Number
6-1 USIU Pins Multiplexing Control.............................................................................. 6-3
6-2 SGPIO Configuration ............................................................................................. 6-7
6-3 Priority of Interrupt Sources ................................................................................. 6-12
6-4 Decrementer Time-Out Periods........................................................................... 6-13
6-5 SIUMCR Bit Descriptions.................................................................................... 6-19
6-6 Debug Pins Configuration.................................................................................... 6-20
6-7 Debug Port Pins Configuration ............................................................................ 6-20
6-8 General Pins Configuration.................................................................................. 6-20
6-9 Single-Chip Select Field Pin Configuration.......................................................... 6-20
6-10 Multi-Level Reservation Control Pin Configuration ............................................ 6-21
6-11 IMMR Bit Descriptions ...................................................................................... 6-22
6-12 EMCR Bit Descriptions ..................................................................................... 6-23
6-13 SYPCR Bit Descriptions ................................................................................... 6-26
6-14 SWSR Bit Descriptions ..................................................................................... 6-27
6-15 TESR Bit Descriptions ...................................................................................... 6-28
6-16 TBSCR Bit Descriptions.................................................................................... 6-30
6-17 RTCSC Bit Descriptions ................................................................................... 6-31
6-18 PISCR Bit Descriptions..................................................................................... 6-32
6-19 PITC Bit Descriptions........................................................................................ 6-33
6-20 PIT Bit Descriptions .......................................................................................... 6-33
6-21 SGPIODT1 Bit Descriptions.............................................................................. 6-34
6-22 SGPIODT2 Bit Descriptions.............................................................................. 6-35
6-23 SGPIOCR Bit Descriptions ............................................................................... 6-35
6-24 Data Direction Control ....................................................................................... 6-36
7-1 Reset Action Taken For Each Reset Cause .......................................................... 7-4
7-2 Reset Configuration Word and Data Corruption/Coherency.................................. 7-4
7-3 Reset Status Register Bit Descriptions.................................................................. 7-5
7-4 Reset Configuration Options.................................................................................. 7-7
7-5 Hard Reset Configuration Word Bit Descriptions................................................ 7-11
8-1 Reset Clocks Source Configuration....................................................................... 8-9
8-2 TMBCLK Divisions................................................................................................. 8-9
8-3 Status of Clock Source ........................................................................................ 8-15
8-4 Power Mode Control Bit Descriptions ................................................................. 8-16
8-5 Power Mode Descriptions................................................................................... 8-16
8-6 Power Mode Wake-Up Operation....................................................................... 8-17
8-7 Clock Unit Power Supply ..................................................................................... 8-20
8-8 KAPWR Registers and Key Registers ................................................................. 8-24
8-9 SCCR Bit Descriptions........................................................................................ 8-30
8-10 PLPRCR Bit Descriptions ................................................................................. 8-34
8-11 COLIR Bit Descriptions..................................................................................... 8-36
8-12 VSRMCR Bit Descriptions ................................................................................ 8-36
9-1 MPC555 / MPC556 SIU Signals ............................................................................ 9-4
9-2 Data Bus Requirements For Read Cycles........................................................... 9-30
MPC555 / MPC556
LIST OF TABLES
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
xl

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