MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 431

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MPC555
USER’S MANUAL
In all single-scan queue operating modes, the software must also enable the queue to
begin execution by writing the single-scan enable bit to a one in the queue’s control
register. The single-scan enable bits, SSE1 and SSE2, are provided for queue 1 and
queue 2 respectively.
Until the single-scan enable bit is set, any trigger events for that queue are ignored.
The single-scan enable bit may be set to a one during the write cycle, which selects
the single-scan queue operating mode. The single-scan enable bit can be written as a
one or a zero, but is always read as a zero. The completion flag, completion interrupt,
or queue status are used to determine when the queue has completed.
After the single-scan enable bit is set, a trigger event causes the QADC64 to begin ex-
ecution with the first CCW in the queue. The single-scan enable bit remains set until
the queue is completed. After the queue reaches completion, the QADC64 resets the
single-scan enable bit to zero. If the single-scan enable bit is written to a one or a zero
by the software before the queue scan is complete, the queue is not affected. Howev-
er, if the software changes the queue operating mode, the new queue operating mode
and the value of the single-scan enable bit are recognized immediately. The conver-
sion in progress is aborted and the new queue operating mode takes effect.
In the software initiated single-scan mode, the writing of a one to the single-scan en-
able bit causes the QADC64 to internally generate a trigger event and the queue exe-
cution begins immediately. In the other single-scan queue operating modes, once the
single-scan enable bit is written, the selected trigger event must occur before the
queue can start. The single-scan enable bit allows the entire queue to be scanned
once. A trigger overrun is captured if a trigger event occurs during queue execution in
the external trigger single-scan mode and the interval timer single-scan mode.
In the interval timer single-scan mode, the next expiration of the timer is the trigger
event for the queue. After the queue execution is complete, the queue status is shown
as idle. The software can restart the queue by setting the single-scan enable bit to a
one. Queue execution begins with the first CCW in the queue.
Software Initiated Single-Scan Mode. Software can initiate the execution of a scan
sequence for queue 1 or 2 by selecting the software initiated single-scan mode, and
writing the single-scan enable bit in QACR1 or QACR2. A trigger event is generated
internally and the QADC64 immediately begins execution of the first CCW in the
queue. If a pause occurs, another trigger event is generated internally, and then exe-
cution continues without pausing.
• Software initiated single-scan mode
• External trigger single-scan mode
• External gated single-scan mode (queue 1 only)
• Interval timer single-scan mode
/
MPC556 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Queue 2 can not be programmed for external gated single-scan
mode.
Rev. 15 October 2000
NOTE
MOTOROLA
13-19