SW006012 Microchip Technology, SW006012 Datasheet - Page 121

• Manufacturer Part Number: SW006012
• Description: C COMPILER FOR DSPIC30F FAMILY
• Manufacturer: Microchip Technology
• Type: MPLAB® C30 Compilerr
• Series: PIC24 & DsPICr

Specifications of SW006012

• Supported Families: PIC24, DsPIC30F And DsPIC33F
• Core Architecture: PIC, DsPIC
• Kit Contents: Software And Docs
• Mcu Supported Families: PIC24 MCUs And DsPIC DSCs
• Tool Type: Compiler
• Processor Series: PIC24, dsPIC
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: dsPIC30F
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

© 2007 Microchip Technology Inc.
If there are no output operands but there are input operands, then there must be two
consecutive colons surrounding the place where the output operands would go. The
compiler requires that the output operand expressions must be L-values. The input
operands need not be L-values. The compiler cannot check whether the operands
have data types that are reasonable for the instruction being executed. It does not
parse the assembler instruction template and does not know what it means, or whether
it is valid assembler input. The extended asm feature is most often used for machine
instructions that the compiler itself does not know exist. If the output expression cannot
be directly addressed (for example, it is a bit field), the constraint must allow a register.
In that case, MPLAB C30 will use the register as the output of the asm, and then store
that register into the output. If output operands are write-only, MPLAB C30 will assume
that the values in these operands before the instruction are dead and need not be
generated.
EXAMPLE 8-4:
Some instructions clobber specific hard registers. To describe this, write a third colon
after the input operands, followed by the names of the clobbered hard registers (given
as strings separated by commas). Here is an example:
asm volatile ("mul.b %0"
: /* no outputs */
: "U" (nvar)
: "w2");
In this case, the operand nvar is a character variable declared in near data space, as
specified by the “U” constraint. If the assembler instruction can alter the flags (condition
code) register, add “cc” to the list of clobbered registers. If the assembler instruction
modifies memory in an unpredictable fashion, add “memory” to the list of clobbered
registers. This will cause MPLAB C30 to not keep memory values cached in registers
across the assembler instruction.
EXAMPLE 8-5:
You can put multiple assembler instructions together in a single asm template,
separated with newlines (written as \n). The input operands and the output operands’
addresses are ensured not to use any of the clobbered registers, so you can read and
write the clobbered registers as many times as you like. Here is an example of multiple
instructions in a template; it assumes that the subroutine _foo accepts arguments in
registers W0 and W1:
asm ("mov %0,w0\nmov %1,W1\ncall _foo"
: /* no outputs */
: "g" (a), "g" (b)
: "W0", "W1");
In this example, the constraint strings “g” indicate a general operand.
Mixing Assembly Language and C Modules
CLOBBERING REGISTERS
USING MULTIPLE ASSEMBLER INSTRUCTIONS
DS51284F-page 115