74AUP1G86 Philips Semiconductors, 74AUP1G86 Datasheet
74AUP1G86
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74AUP1G86 Summary of contents
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... Low-power 2-input EXCLUSIVE-OR gate Rev. 01 — 9 August 2004 1. General description The 74AUP1G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V ...
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... GND Description TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 Marking Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Min Typ = 21 2.3 5 1.8 4 1.5 3 ...
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... 001aab664 Pin description Pin TSSOP5 XSON6 Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate mna039 Fig 2. IEC logic symbol Y mna040 n.c. GND 001aab665 Transparent top view Fig 5. Pin confi ...
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... Power-down mode output current quiescent supply current ground current storage temperature total power +125 C amb dissipation Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Output Min Max 0.5 +4 [1] 0.5 +4.6 < ...
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... 1 1 2 3 2 4 Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Min Max 0.8 3 +125 0 200 Min Typ Max 0. 0. 1.6 ...
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... 2 4 GND Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Min Typ Max - - 0 1 0.65 V ...
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... 3 0 GND GND. CC Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Min Typ Max - - 0 ...
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... Figure Rev. 01 — 9 August 2004 74AUP1G86 [1] Min Typ Max Unit - 21 2.3 5.9 13.1 ns 1.8 4.1 7.7 ns 1.5 3.3 5.9 ns 1.2 2.6 4.4 ns 1.0 2 2.6 6.8 14 ...
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... V to 1 1. 2 3.6 V 0.9 CC Figure 1 1 1 1. 2 3.6 V 1.3 CC Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate [1] Min Typ Max [2] [ +125 C Max Min Max 14.3 2.1 15.8 8.8 1.6 9.7 6.9 1.4 7 ...
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... A, B input M GND output V OL Table 11. and V are typical output voltage drop that occur with the output load Measurement points Output Input 0.5 V 0.5 CC Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate +125 C Max Min Max 18.1 2.7 20.0 11.3 2.2 12.5 9.0 1.9 9.9 7.0 1.6 7.7 6.4 1.5 7.1 24.1 3.5 26.6 14.8 2.8 16.3 11 ...
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... Test data Load [ pF and for measuring propagation delays, setup and hold times Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate EXT DUT 001aac521 ...
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... 1 scale (1) ( 0.30 0.25 2.25 1.35 2.25 0.65 1.3 0.15 0.08 1.85 1.15 REFERENCES JEDEC JEITA MO-203 SC-88A Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate detail 0.46 0.60 0.425 0.3 0.1 0.1 2.0 0.21 0.15 EUROPEAN ISSUE DATE PROJECTION ...
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... scale 0.35 0.40 0.6 0.5 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate 4 ( EUROPEAN ISSUE DATE PROJECTION 04-07-15 04-07-22 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT886 ...
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... Release date 74AUP1G86_1 20050809 9397 750 14684 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate Doc. number Supersedes 9397 750 14684 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 01 — 9 August 2004 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 20 Trademarks Contact information . . . . . . . . . . . . . . . . . . . . 15 74AUP1G86 Low-power 2-input EXCLUSIVE-OR gate © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice ...