74AUP2G04 Philips Semiconductors, 74AUP2G04 Datasheet

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74AUP2G04

Manufacturer Part Number
74AUP2G04
Description
Low-power dual inverter
Manufacturer
Philips Semiconductors
Datasheet
www.DataSheet4U.com
1. General description
2. Features
4
U
.com
The 74AUP2G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
The 74AUP2G04 provides two inverting buffers.
CC
74AUP2G04
Low-power dual inverter
Rev. 01. — 16 January 2006
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114-C Class 3A. Exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 A (maximum)
CC
Preliminary data sheet
OFF
.

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74AUP2G04 Summary of contents

Page 1

... General description The 74AUP2G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V This device ensures a very low static and dynamic power consumption across the entire ...

Page 2

... GND Description SC-88 plastic surface mounted package; 6 leads XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Min Typ Max = 16 2.4 5.0 10 ...

Page 3

... A 74AUP2G04 GND 001aad694 Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter mnb080 Fig 2. IEC logic symbol Y mna110 74AUP2G04 GND 001aad695 Transparent top view Fig 5. Pin confi ...

Page 4

... Function table H = HIGH voltage level LOW voltage level. Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter 74AUP2G04 001aad666 Output © Koninklijke Philips Electronics N.V. 2005. All rights reserved. m ...

Page 5

... For XSON6 packages: above 45 C the value of P Recommended operating conditions Parameter Conditions supply voltage input voltage output voltage active mode Power-down mode; V ambient temperature input transition rise and V CC fall rate Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Min Max 0.5 +4 [1] 0.5 +4 [1] 0.5 +4 ...

Page 6

... GND GND GND Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Min Typ Max Unit ...

Page 7

... 3 0 GND Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Min Typ Max Unit ...

Page 8

... 3 0 GND Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Min Typ Max Unit ...

Page 9

... 1. 1. 2 3.6 V 2.0 CC see Figure 0 1 1 1 1. 2 3.6 V 2.9 CC Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter [1] Typ Max Unit 16 5.0 10.3 ns 3.6 6.4 ns 2.9 5.0 ns 2.4 3.9 ns 2.1 3 5.9 12.2 ns 4.2 7.5 ns 3.5 5.9 ns 2.9 4.6 ns 2.7 3 ...

Page 10

... see Figure Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter [1] Min Typ Max [2] [ +125 C Min ...

Page 11

... V OL Measurement points are given in Table 11. Logic levels: V and V are typical output voltage drop that occur with the output load Measurement points Output Input 0.5 V 0.5 CC Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter +125 C Max Min Max 15.8 3.0 17.4 10.0 2.4 11.0 8.0 2.1 8.8 6.1 1.8 6.8 5.0 1.8 5.5 19.0 4 ...

Page 12

... L 5 pF and 30 pF For measuring enable and disable times for measuring propagation delays, setup and hold times L and pulse width Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter EXT DUT R ...

Page 13

... scale 0.25 2.2 1.35 2.2 1.3 0.65 0.10 1.8 1.15 2.0 REFERENCES IEC JEDEC JEITA SC-88 Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN ISSUE DATE PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...

Page 14

... scale 1.5 1.05 0.35 0.40 0.6 0.5 1.4 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter 4 ( EUROPEAN ISSUE DATE PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT886 04-07-15 04-07- ...

Page 15

... scale 1.05 1.05 0.35 0.40 0.55 0.35 0.95 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter SOT891 2 mm EUROPEAN ISSUE DATE PROJECTION 05-03-11 05-04-06 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 16

... Revision history Document ID Release date 74AUP2G04_1 <tbd> 74AUP2G04_1 Preliminary data sheet 4 U .com Data sheet status Change notice Product data sheet - Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter Doc. number Supersedes - - © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 17

... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 01.00 — 16 January 2006 74AUP2G04 Low-power dual inverter © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 18

... No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 16 January 2006 Document number: 74AUP2G04_1 Published in The Netherlands ...

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