74lvc1g38gf NXP Semiconductors, 74lvc1g38gf Datasheet
74lvc1g38gf
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74lvc1g38gf Summary of contents
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NAND gate; open drain Rev. 03 — 27 August 2007 1. General description The 74LVC1G38 provides a 2-input NAND function. Inputs can be driven from either 3 devices. This feature allows the use of ...
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... C to +125 C 74LVC1G38GV +125 C 74LVC1G38GM +125 C 74LVC1G38GF +125 C 4. Marking Table 2. Marking Type number 74LVC1G38GW 74LVC1G38GV 74LVC1G38GM 74LVC1G38GF 5. Functional diagram 001aab717 Fig 1. Logic symbol 74LVC1G38_3 Product data sheet Description TSSOP5 plastic thin shrink small outline package; 5 leads; ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G38 GND 001aab718 Fig 4. Pin configuration SOT353-1 and SOT753 6.2 Pin description Table 3. Pin description Symbol Pin SOT353-1/SOT753 GND n. Functional description [1] Table 4. Function table Input ...
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... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter [ +85 C amb V HIGH-level input voltage IH V LOW-level input voltage IL V LOW-level output voltage OL I input leakage current I I OFF-state output current ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ I power-off leakage current V OFF I supply current CC I additional supply current CC [1] All typical values are measured ...
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... NXP Semiconductors 12. AC waveforms A, B input Y output Measurement points are given in Logic levels: V and V are typical output voltage levels that occur with the output load Fig 7. The input ( output (Y) propagation delays. Table 9. Measurement points Supply voltage Input 1. 1.95 V ...
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... NXP Semiconductors Test data is given in Table 10. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Load circuitry for switching times Table 10 ...
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... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE ...
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... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions UNIT 0.100 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT753 Fig 10. Package outline SOT753 (SC-74A) 74LVC1G38_3 Product data sheet scale ...
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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION ...
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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 12. Package outline SOT891 (XSON6) ...
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... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date 74LVC1G38_3 20070827 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations ...