74lvx273 STMicroelectronics, 74lvx273 Datasheet

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74lvx273

Manufacturer Part Number
74lvx273
Description
Low Voltage Cmos Octal D-type Flip-flop With Clear 5v Tolerant Inputs
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
The 74LVX273 is a low voltage CMOS OCTAL
D-TYPE FLIP-FLOP WITH CLEAR fabricated with
sub-micron silicon gate and double-layer metal
wiring C
power, battery operated and low noise 3.3V
applications.
Information signals applied to D inputs are
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
HIGH SPEED:
f
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
LOW POWER DISSIPATION:
I
LOW NOISE:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
MAX
CC
PLH
OH
IL
OLP
CC
= 0.8V, V
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 150 MHz (TYP.) at V
= 0.3V (TYP.) at V
2
t
MOS technology. It is ideal for low
PHL
OL
= 4 mA (MIN) at V
IH
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
= 2V at V
A
=25°C
CC
CC
=3.3V
CC
=3V
CC
= 3.3V
=3V
WITH CLEAR (5V TOLERANT INPUTS)
Table 1: Order Codes
transferred to the Q outputs on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVX273
Rev. 3
74LVX273MTR
74LVX273TTR
TSSOP
T & R
1/12

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74lvx273 Summary of contents

Page 1

... Data Retention) CC PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVX273 is a low voltage CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal 2 wiring C MOS technology ideal for low power, battery operated and low noise 3 ...

Page 2

... Figure 2: Input Equivalent Circuit Table 3: Truth Table INPUTS CLEAR Don’t Care Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays 2/12 Table 2: Pin Description PIN N° 12, 15, 16, 13, 14, 17 ...

Page 3

... Value -55 to 125 0 to 100 Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min. 1.5 1.5 2.0 2.0 2.4 2.4 0.5 0.5 0.8 0.8 0.8 0.8 2.0 1.9 1.9 3.0 2.9 2.9 2.48 2.4 0.0 0.1 0.1 0.0 0.1 0.1 0.36 0.44 0 74LVX273 Unit °C °C Unit °C ns/V Unit Max. V 0.5 0.8 V 0.8 V 0.1 0 3/12 ...

Page 4

... Table 7: Dynamic Switching Characteristics Symbol Parameter V Dynamic Low Voltage OLP Quiet Output (note OLV Dynamic High Voltage V IHD Input (note 1, 3) Dynamic Low Voltage V ILD Input (note Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. ...

Page 5

... T OUT Figure 6: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) Test Condition (V) Min. 3 10MHz 3.3 IN Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min CC(opr 74LVX273 Unit Max (per circuit) CC 5/12 ...

Page 6

... Figure 7: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle) Figure 8: Waveform - Recovery Time (f=1MHz; 50% duty cycle) 6/12 ...

Page 7

... MIN. A 2.35 A1 0.1 B 0.33 C 0.23 D 12. 10.00 h 0.25 L 0.4 k 0° ddd mm. TYP MAX. 2.65 0.093 0.30 0.004 0.51 0.013 0.32 0.009 13.00 0.496 7.6 0.291 1.27 10.65 0.394 0.75 0.010 1.27 0.016 8° 0.100 74LVX273 inch MIN. TYP. 0.050 0° 0016022D MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.419 0.030 0.050 8° 0.004 7/12 ...

Page 8

... DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 6.4 E 6 0˚ PIN 1 IDENTIFICATION 1 8/12 TSSOP20 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 1 1.05 0.30 0.20 6.5 6.6 6.4 6.6 4.4 4.48 0.65 BSC 8˚ 0.60 0. inch MIN. TYP. 0.002 0.004 0.031 0.039 0.007 0.004 0.252 0.256 0.244 0.252 0.169 0.173 0.0256 BSC 0˚ 0.018 0.024 ...

Page 9

... Tape & Reel SO-20 MECHANICAL DATA DIM. MIN 12 10.8 Bo 13.2 Ko 3.1 Po 3.9 P 11.9 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 30.4 11 0.425 13.4 0.520 3.3 0.122 4.1 0.153 12.1 0.468 74LVX273 inch MIN. TYP. MAX. 12.992 0.519 1.197 0.433 0.528 0.130 0.161 0.476 9/12 ...

Page 10

... Tape & Reel TSSOP20 MECHANICAL DATA DIM. MIN 12 6.8 Bo 6.9 Ko 1.7 Po 3.9 P 11.9 10/12 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 7.1 0.272 1.9 0.067 4.1 0.153 12.1 0.468 inch MIN. TYP. MAX. 12.992 0.519 0.882 0.276 0.280 0.075 0.161 0.476 ...

Page 11

... Table 9: Revision History Date Revision 27-Aug-2004 3 Description of Changes Ordering Codes Revision - pag. 1. 74LVX273 11/12 ...

Page 12

... Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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