ADE7752 Analog Devices, ADE7752 Datasheet
ADE7752
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ADE7752 Summary of contents
Page 1
... The ADE7752 includes a power supply monitoring circuit on the AV until the supply voltage on V below 4 V, the ADE7752 will also be reset and no pulses will be issued on F1, F2 and CF. Internal phase matching circuitry ensures that the voltage and current channels are phase matched. An internal no-load threshold ensures that the ADE7752 does not exhibit any creep when there is no load ...
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PRELIMINARY TECHNICAL DATA Parameter 1, 2 ACCURACY 1 Measurement Error on Current Channel 1 Phase Error Between Channels (PF = 0.8 Capacitive) (PF = 0.5 Inductive Power Supply Rejection Output Frequency Variation (CF Power Supply Rejection ...
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... Output Pulse Period. See Transfer Function Section sec Time Between F1 Falling Edge and F2 Falling Edge ms CF Pulsewidth (Logic High) sec CF Pulse Period. See Transfer Function Section sec Minimum Time Between F1 and F2 Pulse Model ADE7752AR EVAL-ADE7752EB ADE7752 Evaluation 3 – ORDERING GUIDE Package Description Package Option SOIC Package R-24 Board ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADE7752 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... RESET Reset pin for the ADE7752. A logic low on this pin will hold the ADCs and digital circuitry (including the Serial Interface reset condition Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF ...
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... Master clock for ADCs and digital signal processing. An external clock can be pro- vided at this logic input. Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to provide a clock source for the ADE7752. The clock frequency for specified operation is 10MHz. Ceramic load capacitors of between 22pF and 33pF should be used with the gate oscillator circuit ...
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... can be seen from Equation 7, in the ADE7752 the real power calculation per phase is made when current and voltage inputs of the one phase are connected to the same channel ( C). Then, the summation of each individual real power calculation gives the total Real Power information. P(t) = ...
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... Current channel input and Voltage channel input of the same phase are not in phase in normal operation. Example 3 In this example, the ADE7752 is connected to a 3-phase 3- wire delta service as shown in Figure 14. The total real energy calculation processed in the ADE7752 can be expressed as: ...
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... V . sin(2π/3) represents the RMS voltage between AN VAP and VN pins of the ADE7752 sin (π/3) represents the RMS voltage between BN VBP and VN pins of the ADE7752. As the LPF on each channel eliminates the 2ω the equation, the Real power measured by the ADE7752 is ⋅ ⋅ + ⋅ ...
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... The ADE7752 also includes a “no load threshold” and “start-up current” feature that will eliminate any creep effects in the meter. The ADE7752 is designed to issue a minimum output frequency. Any load generating a frequency lower than this minimum frequency will not cause a pulse to be issued on F1 ...