FAN7711 Fairchild Semiconductor, FAN7711 Datasheet
FAN7711
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FAN7711 Summary of contents
Page 1
... This control scheme enables the FAN7711 to detect an open-lamp condition, without the expense of external circuitry, and prevents stress on MOSFETs. The high-side driver built into the FAN7711 has a common-mode noise cancellation circuit that provides robust operation against high-dv/dt noise intrusion. ...
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... DDH DD LSH SDL SDH S Q ADAPTIVE SDH RESET Q R ZVS CONTROLLER SYSHALT Figure 2. Functional Block Diagram Lamp Q2 FAN7711 Rev. 1.00 HIGH-SIDE DRIVER UVLO 7 Noise S Q Canceller SET RESET LOW-SIDE GATE DRIVER 5 DELAY OUTPUT TRANSITION SENSING 4 FAN7711 Rev. 1.00 GND www ...
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... Pin Configuration Pin Definitions Pin # Name CPH 4 GND © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0 FAN7711 YWW (YWW : Work Week Code CPH GND DD FAN7711 Rev. 1.00 Figure 3 ...
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... Thermal resistance (junction-to-air) JA Note not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the V pin of this device. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 =25°C unless otherwise specified. A Parameter 8-SOP 8-DIP 8-SOP 8-DIP 4 Min ...
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... High-side driver turn-off rising time HOL t Low-side driver turn-on rising time LOR t Low-side driver turn-off rising time LOL Maximum allowable negative V (2) V range for signal propagation to high-side S output © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 Condition V increasing DD V decreasing DD I =10mA 10V DD 50kHz, C ...
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... Characteristics Protection Section V Shutdown voltage CPHSD I Shutdown current SD TSD Thermal shutdown Note: 2. This parameter, although guaranteed, is not 100% tested in production. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 (Continued) Condition after run mode RT (2) 6 Min. Typ. Max. Unit 2.6 V μA 250 °C 165 www ...
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... Temperature [°C] Figure 6. Ignition Current vs. Temp. 100 -40 - Temperature [°C] Figure 8. High-Side Quiescent Current vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 3.0 2.5 2.0 1.5 1.0 - 100 120 Figure 5. Preheating Current vs. Temp. 4.0 3.5 3.0 2.5 2 100 120 -40 400 300 ...
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... Temperature [°C] Figure 12. V Clamp Voltage vs. Temp -40 - Temperature [°C] Figure 14. Running Frequency vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 (Continued) 10.0 9.6 9.2 8.8 8.4 8 100 120 -40 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1 100 120 -40 Figure 13. Shutdown Voltage vs. Temp. 100 ...
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... Typical Characteristics 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -40 - Temperature [°C] Figure 16. Minimum Dead Time vs. Temp. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 (Continued) 4.0 3.6 3.2 2.8 2.4 2 100 120 -40 Figure 17. Maximum Dead Time vs. Temp 100 120 Temperature [°C] www.fairchildsemi.com ...
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... Typical Application Information 1. Under-Voltage Lockout (UVLO) Function The FAN7711 has UVLO circuits for both high-side and low-side circuits. When V reaches released and the FAN7711 operates normally. At UVLO condition, FAN7711 consumes little current, noted I . Once UVLO is released, FAN7711 operates normally ST until V ...
Page 11
... Ignition mode is defined when CPH voltage lies between 3V and 5V. Once CPH voltage reaches 5V, the FAN7711 does not return to ignition mode, even if the CPH voltage is in that range, until the FAN7711 restarts from below V continues when CPH is from 3V to 5V, the ignition time is ...
Page 12
... C t=1/f OSC Since the open-lamp condition means resonant tank absence impossible to meet ZVS condition. In this condition, the power dissipation of the FAN7711, due to capacitive load drive, is estimated as: where f is driving frequency and Figure 22 shows an example of external ...
Page 13
... FAN7711 tries to meet ZVS condition by decreasing CPH voltage to increase dead time. If ZVS fails and CPH goes below 2V, even though the dead time reaches its maximum value, FAN7711 shuts off the IC to protect against damage. To restart FAN7711, V below V to reset an internal latch circuit, which DDTH(ST-) remembers the status of the IC ...
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... CPH V S GND LO C Dp1 FAN7711 Rev. 1.00 Charge Pump Figure 26. Implementation of Floating Power Supply Using the Bootstrap Method © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 is reverse-biased and B voltage decreases the high-side driver LCC resonant tank Charging path C ...
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... C . For example start VDD =10µF, I =120µA, and V VDD st is about 0.33s. start R start CPH VDD GND FAN7711 Rev. 1.00 Figure 28. Equivalent Circuit During Start at that start time ) (EQ 15 start + ( ) (EQ 16) (EQ 17) =311V DDTH(ST+) www.fairchildsemi.com ...
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... Equation 17. When the start after turn-on or DDTH(ST+) CPH = t 3 preheat CPH CPH GND FAN7711 Rev. 1.00 Figure 30. Preheating Timer CPH CPH = − ignition Consequently, total turn-on PH CPH CPH = − ...
Page 17
... The signal GND must be separated from the power GND. So, the signal GND should be directly connected to the rectify capacitor using an individual PCB trace. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 In addition, the ground return path of the timing components (CPH, RT) and V should be connected directly to the IC GND lead and not via separate traces or jumpers to other ground traces on the board ...
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... C1 C2 INPUT C4 Rectified Waveform D50 R50 D51 R51 R52 CPH R53 5 C52 GND C51 C50 FAN7711 Rev. 1.00 © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 Rectified Waveform NTC 1 INV COMP 3 MOT ...
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... C8 1µF/50V C9 1µF/50V C10 0.1µF/50V C11 47µF/450V C50 10µF/50V C51 1µF/50V C52 0.47µF/25V C53 100nF/50V C54 470pF/1kV © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 Note Part C55 1/2W C56 1/4W C57 1/2W C58 1/4W 1/4W D1 1/4W D2 1/ ...
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... Capacitor C1 22µF/250V C2 10µF/50V C3 470nF/25V C4 100nF/25V C5 470pF/630V C6 33nF/630V C7 3.9nF/1kV Note: 3. Refer to the typical application circuit provided in Figure 1. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 Note Part 1/4W D1 1/4W D2 1/4W D3 1/ Electrolytic Capacitor Electrolytic Capacitor L1 Miller Capacitor Miller Capacitor ...
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... Package Dimensions 8-SOP Dimensions are in millimeters unless otherwise noted ±0.20 0.50 0.020 ±0.008 © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 1.55 0.061 #8 #5 ±0.30 6.00 1.80 0.236 ±0.012 0.071 ±0.20 3.95 ±0.008 0.156 5.72 0.225 Figure 33. 8-Lead Small Outline Package (SOP) 21 0.1~0.25 MIN ±0.20 0.004~0.001 ± ...
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... Package Dimensions 8-DIP Dimensions are in inches and [millimeters] unless otherwise noted. © 2007 Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 Figure 34. 8-Lead Dual In-Line Package (DIP) 22 www.fairchildsemi.com ...
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... Fairchild Semiconductor Corporation FAN7711 Rev. 1.0.2 23 www.fairchildsemi.com ...