IDT70V9269 Integrated Device Technology, Inc., IDT70V9269 Datasheet
IDT70V9269
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IDT70V9269 Summary of contents
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... True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12/15ns (max.) Low-power operation – IDT70V9269S Active: 429mW (typ.) Standby: 3.3mW (typ.) – IDT70V9269L Active: 429mW (typ.) Standby: 1.32mW (typ.) Flow-through or Pipelined output mode on either port via ...
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... This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. Industrial and Commercial Temperature Ranges With an input data register, the IDT70V9269 has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’ ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM Left Port Right Port Chip Enables 0L, 1L 0R, 1R R/W R/W Read/Write Enable Output Enable Address 0L 13L 0R 13R I/O - I/O I/O - I/O Data Input/Output 0L 15L 0R 15R CLK CLK Clock Upper Byte Select Lower Byte Select ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM Previous Addr Address Address Used CLK NOTES: 1. "H" "L" "X" = Don't Care. IH, IL LB, UB, and and R Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle. ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM Symbol Parameter ( Input Leakage Current Output Leakage Current LO V Output Low Voltage OL V Output High Voltage OH NOTE Vcc < 2.0V input leakages are undefined. Symbol Parameter Test Condition CE and CE I Dynamic CC L Operating ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT 435 Figure 1. AC Output Test load. , tCD 1 tCD 2 (Typical, ns) GND to 3.0V 3ns 1.5V 1.5V Figures 1, 2, and 3 3752 tbl 10 3 ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM Symbol t Clock Cycle Time (Flow-Through) CYC1 (2) t Clock Cycle Time (Pipelined) CYC2 t Clock High Time (Flow-Through) CH1 (2) t Clock Low Time (Flow-Through) CL1 (2) t Clock High Time (Pipelined) CH2 (2) t Clock Low Time (Pipelined) ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM t CH1 CLK UB (5) ADDRESS An DATA OUT t CKLZ ( CH2 CLK UB (5) ADDRESS An (1 Latency) DATA OUT (2) OE NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2 asynchronously controlled; all other inputs are synchronous to the rising clock edge. ...
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... ADDRESS MATCH R DATA OUT NOTES Represents Device #1; B2 Represents Device #2. Each Device consists of one IDT70V9269 for this waveform, and are setup for depth expansion in this example. ADDRESS = ADDRESS in this situation. (B1) (B2) 2. UB, LB, OE, and ADS = 1(B1) 1(B2) 3. Transition is measured 0mV from Low or High-Impedance voltage with the Output Test Load (Figure 2). ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM t CYC2 t t CH2 CLK UB (4) An ADDRESS DATA IN (2) DATA OUT READ t CYC2 t t CH2 CL2 CLK UB (4) An ADDRESS DATA IN (2) DATA OUT OE READ NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM t CYC1 t CH1 CLK UB (4) ADDRESS DATA IN t CD1 (2) DATA OUT t CYC1 t CH1 CLK UB (4) An ADDRESS DATA IN t CD1 (2) DATA OUT OE READ NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM t CYC2 t CH2 CLK ADDRESS t t SAD HAD ADS CNTEN ( DATA OUT READ EXTERNAL ADDRESS t CYC1 t CH1 CLK ADDRESS t t SAD HAD ADS CNTEN t CD1 (2) Qx DATA OUT t DC READ EXTERNAL ADDRESS NOTES: 1 ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM t CYC2 t CH2 CLK ADDRESS (3) INTERNAL An ADDRESS t t SAD HAD ADS (7) CNTEN DATA IN WRITE EXTERNAL ADDRESS t CYC2 t t CH2 CL2 CLK ADDRESS (3) (6) INTERNAL Ax ADDRESS W R/ ADS CNTEN t t SRST HRST CNTRST DATA ...
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... IDT70V9269 Control Inputs IDT70V9269 Control Inputs The IDT70V9269 features dual chip enables (refer to Truth Table 1) in order to facilitate rapid and simple depth expansion with no requirements for external logic. Figure 4 illustrates how to control the various chip enables in order to expand two devices in depth. ...
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... IDT70V9269S/L High-Speed 16K x 16 Dual-Port Synchronous Pipelined Static RAM IDT XXXXX A 99 Device Power Speed Type NOTE: 1. Industrial temperature range is available. For specific speeds, packages and powers contact your sales office. 1/12/99: Initiated datasheet document history Converted to new format Cosmetic and typographical corrections ...