IDT72V3660 Integrated Device Technology, Inc., IDT72V3660 Datasheet
IDT72V3660
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IDT72V3660 Summary of contents
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... READ POINTER 65,536 x 36, 131,072 x36 OUTPUT REGISTER Q -Q (x36, x18 or x9 IDT72V3640, IDT72V3650 IDT72V3660, IDT72V3670 IDT72V3680, IDT72V3690 IDT72V36100, IDT72V36110 LD SEN FF/IR PAF EF/OR PAE FLAG HF LOGIC FWFT/SI PFM ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690/ 72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In- ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 RCLK when REN is asserted. An Output Enable (OE) ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 asserted and updated on the rising edge of WCLK only ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 Symbol Name I/O D –D Data Inputs I Data inputs ...
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... Input High Voltage Com’l/Ind’l 2.0 — Input Low Voltage Com’l/Ind’l — — Operating Temperature 0 — Commercial Operating Temperature -40 — Industrial = - +85 C; JEDEC JESD8-A compliant) A IDT72V3640L IDT72V3650L IDT72V3660L IDT72V3670L IDT72V3680L IDT72V3690L IDT72V36100L IDT72V36110L Commercial and Industrial ( 7.5, 10 CLK Min. Max. –1 1 –10 10 2.4 — ...
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... COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES = - +85 C; JEDEC JESD8-A compliant) A Com’l & Ind’l IDT72V3640L10 IDT72V3640L15 IDT72V3650L10 IDT72V3650L15 IDT72V3660L10 IDT72V3660L15 IDT72V3670L10 IDT72V3670L15 IDT72V3680L10 IDT72V3680L15 IDT72V3690L10 IDT72V3690L15 IDT72V36100L10 IDT72V36100L15 IDT72V36110L10 IDT72V36110L15 Min. Max. Min. — 100 — 2 6.5 ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels ...
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... If no reads are performed after a reset, IR will go HIGH after D writes to the FIFO 1,025 writes for the IDT72V3640, 2,049 writes for the IDT72V3650, 4,097 writes for the IDT72V3660 and 8,193 writes for the IDT72V3670,16,385 writes for the IDT72V3680, 32,769 writes for the IDT72V3690, 65,537 writes for the IDT72V36100 and 131,073 writes for the IDT72V36110, respectively ...
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... IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 IDT72V3640, 72V3650 LD FSEL1 FSEL0 FSEL1 FSEL0 IDT72V3660, 72V3670, 72V3680, 72V3690 LD FSEL1 FSEL0 FSEL1 FSEL0 IDT72V36100, 72V36110 LD FSEL1 FSEL0 FSEL1 FSEL0 ...
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... H H (n+1) to 32,768 (n+1) to 65,536 H H 32,769 to (65,536-(m+1)) 65,537 to (131,072-(m+1 (65,536-m) to 65,535 (131,072-m) to 131,071 L L 65,536 131,072 PAF HF PAE OR IR IDT72V3670 IDT72V3660 n n (n+2) to 2,049 (n+2) to 4,097 L H 2,050 to (4,097-(m+1 4,098 to (8,193-(m+1)) (4,097-m) to 4,096 (8,193-m) to 8,192 L L 4,097 ...
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... WCLK edge Starting with Empty Offset (LSB) Ending with Full Offset (MSB COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT72V3640 IDT72V3650 IDT72V3660 IDT72V3670 IDT72V3680 IDT72V3690 IDT72V36100 IDT72V36110 No Operation Write Memory Read Memory No Operation 4667 drw 06 ...
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... COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES # of Bits Used: 10 bits for the IDT72V3640 11 bits for the IDT72V3650 12 bits for the IDT72V3660 13 bits for the IDT72V3670 14 bits for the IDT72V3680 15 bits for the IDT72V3690 16 bits for the IDT72V36100 17 bits for the IDT72V36110 Note: All unused bits of the LSB & ...
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... FULL OFFSET REGISTER (PAF) IDT72V36110 x9 Bus Width # of Bits Used: 10 bits for the IDT72V3640 11 bits for the IDT72V3650 12 bits for the IDT72V3660 13 bits for the IDT72V3670 14 bits for the IDT72V3680 15 bits for the IDT72V3690 16 bits for the IDT72V36100 17 bits for the IDT72V36110 Note: All unused bits of the LSB & ...
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... WCLK rising edge, starting with the Empty Offset LSB and ending with the Full Offset MSB. A total of 20 bits for the IDT72V3640, 22 bits for the IDT72V3650, 24 bits for the IDT72V3660, 26 bits for the IDT72V3670, 28 bits for the IDT72V3680, 30 bits for the IDT72V3690, 32 bits for the IDT72V36100 and 34 bits for the IDT72V36110 ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 was HIGH before setup. During this period, the ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 DATA Data inputs ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 prevent data overflow in the FWFT mode, IR will ...
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... In FWFT mode reads are performed after reset (MRS or PRS), HF will go LOW after (D-1 writes to the FIFO, where D = 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110 ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT: ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT: ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 MRS t RSS REN t RSS WEN t RSS FWFT/SI ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 PRS t RSS REN t RSS WEN t RSS RT ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 WRITE WCLK 1 (1) t SKEW1 ...
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... PAE offset PAF offset and D = maximum FIFO depth 1,025 for IDT72V3640, 2,049 for IDT72V3650, 4,097 for IDT72V3660, 8,193 for IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110. 6. First data word latency = t ...
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... SKEW2 HIGH PAE Offset PAF offset and D = maximum FIFO depth 1,025 for IDT72V3640, 2,049 for IDT72V3650, 4,097 for IDT72V3660, 8,193 for IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110. (2) t SKEW2 ...
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... No more than may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure 1,024 for IDT72V3640, 2,048 for IDT72V3650, 4,096 for IDT72V3660, 8,192 for IDT72V3670, 16,384 for the IDT72V3680, 32,768 for the IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110 ...
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... No more than words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110 ...
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... No more than may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure 1,024 for IDT72V3640, 2,048 for IDT72V3650, 4,096 for IDT72V3660, 8,192 for IDT72V3670, 16,384 for the IDT72V3680, 32,768 for the IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110 ...
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... DS SI BIT 0 NOTE for the IDT72V3640 for the IDT72V3650 for the IDT72V3660 for the IDT72V3670 for the IDT72V3680 for the IDT72V3690 for the IDT72V36100 and for the IDT72V36110. Figure 15. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes) 36-BIT FIFO ...
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... IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110. In FWFT mode 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110. ...
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... IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110. In FWFT Mode 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110. ...
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... IDT72V3680, 32,768 for the IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110 FWFT mode maximum FIFO depth 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680, 32,769 for the IDT72V3690, 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110. ...
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... DEPTH EXPANSION CONFIGURATION (FWFT MODE ONLY) The IDT72V3640 can easily be adapted to applications requiring depths greater than 1,024, 2,048 for the IDT72V3650, 4,096 for the IDT72V3660, 8,192 for the IDT72V3670, 16,384 for the IDT72V3680, 32,768 for the IDT72V3690, 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110 with an 18-bit bus width ...
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IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II 1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36 FWFT/SI FWFT/SI WRITE CLOCK WCLK IDT 72V3640 WRITE ENABLE WEN ...
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... Stender Way Santa Clara, CA 95054 *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The SuperSync ll FIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc ...