IDTCSP2510C Integrated Device Technology, IDTCSP2510C Datasheet
![no-image](/images/no-image-200.jpg)
IDTCSP2510C
Available stocks
Related parts for IDTCSP2510C
IDTCSP2510C Summary of contents
Page 1
... The CSP2510C is specified for operation from 0°C to +85°C. This device is also available (on special order) in Industrial temperature range (-40°C to +85°C). See ordering information for details PLL 0ºC TO 85ºC TEMPERATURE RANGE IDTCSP2510C to ground ...
Page 2
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER PIN CONFIGURATION AGND GND 7 GND FBOUT 12 TSSOP TOP VIEW RECOMMENDED OPERATING CONDITIONS Symbol Power Supply Voltage Operating Free-Air Temperature A ABSOLUTE MAXIMUM RATINGS Symbol (1) ...
Page 3
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER PIN DESCRIPTION Terminal Name No. Type CLK 24 I Clock input. CLK provides the clock signal to be distributed by the CSP2510C clock driver. CLK is used to provide the reference signal to the integrated PLL that generates the clock output signals. CLK must have a fixed frequency and fixed phase for the PLL to obtain phase lock ...
Page 4
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING FREE-AIR TEMPERA- (1) TURE RANGE Symbol Description V Input Clamp Voltage IK V Input HIGH Level IH V Input LOW Level IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Current I I Supply Current ...
Page 5
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER SWITCHING CHARACTERISTICS OVER OPERATING RANGE OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, C Parameter (2) From (Input) t error 100MHz < CLK < 133MHz PHASE (3) t error – jitter CLK = 133MHz PHASE (4) t Any Y (133MHz) SK(o) Jitter (cycle-cycle) CLK = 133MHz (peak-to-peak) Duty cycle reference ...
Page 6
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER PARAMETER MEASUREMENT INFORMATION From Output Under Test C =30pF L Y CLK CSP2510C F BOUT F BIN C F PCB TRACE NOTES: 1. All inputs pulses are supplied by generators having the following characteristics includes probe and jig capacitance The outputs are measured one at a time with one transition per measurement. ...
Page 7
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER TYPICAL CHARACTERISTICS 200 150 100 -50 -100 -150 -200 Phase Error vs Clock Frequency AV and 25C 50 66 100 Clock Frequency (MHz) Analog Supply Current vs. Clock Frequency AV and 25C ...
Page 8
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER TYPICAL CHARACTERISTICS (CONT 100 Output Duty Cycle vs Clock Frequency AV and 25C 50 66 100 Clock Frequency (MHz) Jitter vs Clock Frequency Avcc and Vcc = 3. 25C Peak to Peak Cycle to Cycle ...
Page 9
... IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER ORDERING INFORMATION IDTCSP XXXXX XX Device Type Package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 X Process Blank 0°C to +85°C (standard) I -40°C to +85°C (Industrial) PG Thin Shrink Small Outline Package PGG TSSOP - Green 2510C Phase-Lock Loop Clock Driver ...