IDT
LDS6003
PureTouch™ Capacitance Touch IC
The LDS6003 PureTouch™ controller empowers system designers to create streamlined, attractive,
and reliable product designs, enabling the replacement of mechanical controls with capacitive touch
buttons, sliders, and scroll wheels.
®
LDS6003 Features
Versatile, accurate capacitance-
to-digital converter (CDC)
• 500 kHz sigma-delta CDC
• 6 capacitance sensor input channels
• 2 ms update rate per active sensor
Integrated, automatic
calibration algorithms
• Environmental compensation
• On-chip RAM to store calibration data
Integrated touch preference modes
• Strongest single touch
• Strongest two touches
• Unrestricted (all) touches
Ultra-low touch sensor
power consumption*
• Operating mode (typical):
• Shutdown mode (typical):
Flexible interface options
• SPI-compatible serial I/F
• I
• Separate V
• GPIO and Interrupt Output
* excludes I/F and voltage dependent V
LDS6003 PureTOuCH™ CaPaCITanCe TOuCH IC
<150 uW (VDD1=1.8V)
<1 uW (VDD1=1.8V)
2
C-compatible serial I/F
DDIO
level for serial interface
®
®
DDIO
current
semiconductor solutions
Description
The LDS6003 is a programmable capacitance-to-digital converter (CDC) designed for use with capacitive
sensor arrays implementing touch-based input controls including sliders, scroll wheels, and buttons.
Featuring 6 sensor inputs, the LDS6003 provides the flexibility to implement multiple touch inputs using
a single controller.
The capacitive sensor inputs are directed through an integrated switch matrix to a 500 kHz sigma-delta
CDC which senses changes in the external sensor array. When a sufficiently large change in capacitance
occurs, a sensor activation is registered and the host processor is notified.
On-chip calibration logic continuously monitors the environment and automatically adjusts on-and-off
threshold levels to prevent false sensor activation. The LDS6003 is offered with both SPI-compatible and
I
output (GPIO) and interrupt output for additional communication with the host processor.
RESETB
I/F SEL
Figure 1. LDS6003 block diagram
2
VDDIO
C-compatible interfaces (active interface selected by I/F select pin) and features a general-purpose input/
VDD1
VSS1
TEST
Reset Logic
SD0/
SDA
Power-On
Serial Interface and
Control Logic
SDI/
A1
1
SCLK/
SCL
CSB/
A1
Calibration
Engine
Calibration
LDS6003
RAM
Interrupt and GPIO Logic
GPIO
Data Registers
Control and
®
INTB
Sigma-Delta
CDC
Excitation
500 kHz
Source
C0
C1
C2
C3
C4
C5
SHIELD