LT1719 Linear Technology, LT1719 Datasheet
LT1719
Available stocks
Related parts for LT1719
LT1719 Summary of contents
Page 1
... The LT1719 is available in the 8-pin SO package; a shutdown control allows for reduced power consumption and extended battery life in portable applications. For a dual/quad comparator with similar performance, see the LT1720/LT1721 ...
Page 2
... Between 10% to 90% 90 INFORMATION ORDER PART TOP VIEW NUMBER LT1719CS8 OUT LT1719IS8 – SHDN GND S8 PART MARKING S8 PACKAGE 1719 8-LEAD PLASTIC SO = 150 C, = 200 C/ W 1719I JMAX 10pF 0.5V, CM OUT ...
Page 3
... Overdrive is measured relative and Note 8: t TRIP PD low values of overdrive. The LT1719 is 100% tested with a 100mV = 5V, step and 20mV overdrive. Correlation tests have shown that t CC can be guaranteed with this test, if additional DC tests are performed to guarantee that all internal bias conditions are correct. ...
Page 4
... LT1719 W U TYPICAL PERFORMANCE CHARACTERISTICS Input Offset and Trip Voltages vs Supply Voltage TRIP –1 – V TRIP 25 C – GND EE –3 4.5 5.5 6.0 2.5 3.0 3.5 4.0 5.0 SUPPLY VOLTAGE ( 1719 G01 Input Current vs Differential Input Voltage –1 – 2 – 3 – ...
Page 5
... S TEMPERATURE ( C) Response Time Test Circuit 0V –100mV 25 25 50k 0.1 F 130 50 V1* 2N3866 1N5711 400 750 *V1 = –1000 • (OVERDRIVE + V NOTE: RISING EDGE TEST SHOWN. FOR FALLING EDGE, REVERSE LT1719 INPUTS –5V Supply Current vs Frequency 10mV 20pF LOAD ...
Page 6
... V anyway. Conversely long as the above rules are not violated. Input Voltage Considerations The LT1719 is specified for a common mode range of –100mV to 3.8V when used with a single 5V supply. A more general consideration is that the common mode range is 100mV below V ...
Page 7
... However, with the 2V/ns slew rate of the LT1719 outputs, a 4mV step can be created at a 100 input source with only 0.02pF of output to input coupling. The LT1719’s pinout has been arranged to minimize problems by placing the sensitive inputs away from the outputs, shielded by the power rails ...
Page 8
... The ground trace from Pin 5 runs under the device up to the bypass capacitor, shielding the inputs from the outputs. Note the use of a common via for the LT1719 and the bypass capacitors, which minimizes interference from high frequency energy running around the ground plane or power distribution traces ...
Page 9
... OS HYST adding additional external resistor R3 as shown in Figure 4. Resistor R3 adds a portion of the output to the threshold set by the resistor string. The LT1719 pulls the outputs and ground to within 200mV of the rails with light S loads, and to within 400mV with heavy loads. For the load ...
Page 10
... R1 may also be required. Note that the currents through the R1/R2 bias string should be many times the input currents of the LT1719. For 5% accuracy, the current must be at least 20 times the input current, more for higher accuracy. Interfacing the LT1719 to ECL ...
Page 11
... V ECL Figure 6 Circuit Description The block diagram of the LT1719 is shown in Figure 7. The circuit topology consists of a differential input stage, a gain stage with hysteresis and a complementary com- mon-emitter output stage. All of the internal signal paths utilize low voltage swings for high speed at low power. ...
Page 12
... Because the propagation delay (t definition ends at the time the output voltage is halfway between the supplies, the fixed slew current makes the LT1719 faster at 3V than 5V with large capacitive loads and sufficient input overdrive. Another manifestation of this output speed limit is skew, ...
Page 13
... The circuit will operate with any AT-cut crystal from 1MHz to 10MHz over a 2. supply range. As the power is applied, the circuit remains off until the LT1719 bias circuits activate typical 2.2V (25 C), at which point the desired frequency output is generated. ...
Page 14
... LT1719 PLIFIED SCHE ATIC 14 ...
Page 15
... TYP 0.014 – 0.019 (0.355 – 0.483) TYP LT1719 0.150 – 0.157** (3.810 – 3.988 0.004 – 0.010 (0.101 – 0.254) 0.050 (1 ...
Page 16
... With small input signals, the hysteresis and dispersion make the LT1719 act like a comparator with a 12mV hysteresis span. In other words, a 12mV 10MHz will barely toggle the LT1719, with 90 of phase lag or 25ns additional delay. Above 5V P-P crease due to internal capacitive feed-forward in the input stage ...