LTC1279 LINER [Linear Technology], LTC1279 Datasheet
LTC1279
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LTC1279 Summary of contents
Page 1
... Instant wake-up from power shutdown allows the converter to be powered down even during brief inactive periods. The LTC1279 converts unipolar inputs from a single 5V supply and 2.5V bipolar inputs from 5V supplies. Maximum DC specs include 1LSB INL and 1LSB DNL. Outstanding guaranteed AC performance includes 70dB S/( and 78dB THD at the input frequency of 100kHz over temperature ...
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... Bipolar Operation.......................... V Digital Output Voltage Unipolar Operation ................... – 0. Bipolar Operation..................... – 0. Power Dissipation ............................................. 500mW Operating Temperature Range LTC1279C............................................... LTC1279I ........................................... – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 VERTER C HARA TERISTICS ...
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... 4.95V 160 1.6mA High OUT DD CS High (Note OUT OUT DD LTC1279 MIN TYP MAX UNITS – 82 – – – 82 – – – – – ...
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... LTC1279 W U POWER REQUIRE E TS SYMBOL PARAMETER V Positive Supply Voltage (Notes 11, 12 Negative Supply Voltage (Note 11, 12 Positive Supply Current DD I Negative Supply Current SS P Power Dissipation CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) t Minimum Throughput Time ...
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... See mode 1a and 1b (Figures 12 and 13) timing diagrams. Differential Nonlinearity vs Output Code 1 600kHz SAMPLE 0.5 0 –0.5 –1.0 0 512 1536 2048 2560 3072 1024 3584 OUTPUT CODE LTC1279 or fall below V by more than 50mV for DD SS ENOBs and S/( Input Frequency NYQUIST FREQUENCY ...
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... LTC1279 W U TYPICAL PERFORMANCE CHARACTERISTICS S/( Input Frequency and Amplitude 0dB –20dB –60dB 600kHz SAMPLE 0 10k 100k 1M 10M INPUT FREQUENCY (Hz) 1279 G04 Peak Harmonic or Spurious Noise vs Input Frequency 600kHz –10 SAMPLE –20 –30 – ...
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... DGND (Pin 12): Digital Ground (Pins 13 to 16): Three-State Data Outputs. DV (Pin 17 ): Digital Power Supply, 5V. Tie SHDN (Pin 18): Power Shutdown. The LTC1279 pow- ers down when SHDN is low. CONVST (Pin 19): Conversion Start Input active low. The falling edge of the CONVST signal initiates a U ...
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... U U APPLICATIONS INFORMATION CONVERSION DETAILS The LTC1279 uses a successive approximation algorithm and an internal sample-and-hold circuit to convert an analog signal to a 12-bit parallel output. The ADC is complete with a precision reference and an internal clock. The control logic provides easy interface to microproces- sors and DSPs. (Please refer to the Digital Interface section for the data format ...
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... S/( the equation [S/( – 1.76]/6.02 = 600kHz where N is the Effective Number of Bits of resolution and S/( expressed in dB. At the maximum sampling rate of 600kHz the LTC1279 maintains very good ENOBs up to the Nyquist input frequency of 300kHz. Refer to Figure 3. 250 300 1279 F02a Figure 3. Effective Bits and Signal/(Noise + Distortion) vs ...
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... Nyquist. Driving the Analog Input The LTC1279’s analog input is easy to drive. It draws only one small current spike while charging the sample-and- hold capacitor at the end of conversion. During conversion the analog input draws no current. The only requirement ...
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... Figure 7 shows a IN typical reference, the LT1019A-2.5 connected to the LTC1279. This will provide an improved drift (equal to the LT1019A-2.5’s maximum of 5ppm/ C) and a 2.582V full scale. UNIPOLAR/BIPOLAR OPERATION AND ADJUSTMENT Figure 8a shows the ideal input/output characteristics for the LTC1279 ...
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... Bipolar offset error ad- LTC1279 justment is achieved by trimming the offset of the op amp AGND driving the analog input of the LTC1279 while the input voltage is 0.5LSB below ground. This is done by applying 1279 F09a an input voltage of – 0.61mV (– 0.5LSB) to the input in Figure 9c and adjusting the R8 until the ADC output code flickers between 0000 0000 0000 and 1111 1111 1111 ...
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... ADC is in inactive periods. To power down the ADC, pin 18 (SHDN) needs to be driven low. When in power shutdown mode, the LTC1279 will not start a conversion even though the CONVST goes low. All the power is off except the Internal Reference which is still active and provides 2 ...
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... LTC1279 PPLICATI S I FOR ATIO Timing and Control Conversion start and data read operations are controlled by three digital inputs: CS, CONVST and RD. Figure 11 shows the logic structure associated with these inputs. A logic “0” for CONVST will start a conversion after the ADC has been selected (i ...
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... DATA N DB11 TO DB0 Figure 15. Slow Memory Mode t CONV SAMPLE DATA (N – 1) DB11 TO DB0 Figure 16. ROM Mode Timing LTC1279 DATA ( DB11 TO DB0 1279 F13 ) DATA ( DB11 TO DB0 1279 F14 DATA N DATA ( DB11 TO DB0 DB11-DB0 1279 F15 ...
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... LTC1279 PACKAGE DESCRIPTIO 0.291 – 0.299 (7.391 – 7.595) (NOTE 2) 0.005 0.010 – 0.029 45 (0.127) (0.254 – 0.737) RAD MIN 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. ...