LTC1594L Linear Technology, LTC1594L Datasheet
LTC1594L
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LTC1594L Summary of contents
Page 1
... They typically draw only 160 A of supply current when converting and automatically power down to a typical supply current of 1nA between conversions. The LTC1594L is available in a 16-pin SO package and the LTC1598L is packaged in a 24-pin SSOP. Both operate supply. The 12-bit, switched- capacitor, successive approximation ADCs include a sample-and-hold ...
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... CS Low Time During Data Transfer WLCS 2 U RATINGS Power Dissipation .............................................. 500mW Operating Temperature Range + 0.3V) LTC1594LCS/LTC1598LCG ..................... 0.3V) LTC1594LIS/LTC1598LIG ................. – Storage Temperature Range ................. – 150 C + 0.3V) Lead Temperature (Soldering, 10 sec).................. 300 ORDER PART NUMBER 1 CH5 ...
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... CLK = 760 s, f 25kHz CYC CLK 200kHz CYC CLK LTC1594L/LTC1598L The denotes the specifications which = 25 C. (Note 5) A LTC1594LIS/LTC1598LIG MAX MIN TYP MAX 3 1. 0.05V CC – 0.05V 0.05V CC 200 200 ...
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... LTC1594L/LTC1598L AC CHARACTERISTICS otherwise specifications are C.(Note 5) A SYMBOL PARAMETER t Analog Input Sample Time SMPL f Maximum Sampling Frequency SMPL(MAX) t Conversion Time CONV t Delay Time, CLK to D Data Valid dDO OUT t Delay Time Hi-Z dis OUT t Delay Time, CLK to D Enabled ...
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... 2. 2.5V REF f = 1kHz SMPL SMPL(MAX – 45 – 40 – 25 – 20 – 35 – 30 – 15 – 10 – 5 INPUT LEVEL (dB) 1594L/98/ G11 LTC1594L/LTC1598L Change in Linearity vs Reference Voltage 200kHz CLK 0. 10.5kHz SMPL 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 2.2 2.4 2.6 1.0 1.2 1.4 1.6 1.8 2.0 REFERENCE VOLTAGE (V) 1594L/98L G06 ...
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... LTC1594L/LTC1598L W U TYPICAL PERFORMANCE CHARACTERISTICS 4096 Point FFT Plot 2.7V CC – 2.5V REF f = 3.05kHz 120kHz CLK – 7.5kHz SMPL – 60 – 80 – 100 – 120 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 FREQUENCY (kHz) 1594L/98L G13 Maximum Clock Frequency vs Source Resistance 200 190 180 ...
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... For normal operation drive this pin in parallel with CSMUX. D (Pin 11): Digital Data Output. The A/D conversion OUT result is shifted out of this output. NC (Pin 12): No Connection. NC (Pin 13): No Connection. CLK (Pin 14): Shift Clock. This input should be tied to Pin 5. LTC1594L/LTC1598L 7 ...
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... ADCIN (Pin 17): ADC Input. This input is the positive analog input to the ADC. Connect this pin to MUXOUT for normal operation. MUXOUT (Pin 18): MUX Output. This pin is the output of the multiplexer. Tie to ADCIN for normal operation. W BLOCK DIAGRA S LTC1594L 15 5 LTC1594L MUXOUT ADCIN 1 CH0 2 CH1 12-BIT 4-CHANNEL + ...
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... NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL. NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL. LTC1594L/LTC1598L Voltage Waveforms for ...
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... Supply Current vs Sample Rate). The ADCs automatically power down when not performing conversions, drawing only leakage current. The LTC1594L is available in a 16-pin narrow SO package and the LTC1598L is pack- aged in a 24-pin SSOP. Both devices operate on a single supply from 2 ...
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... CH0 TO CH7 ADCIN = MUXOUT COM = GND Figure 2. LTC1594L/LTC1598L Operating Sequence Example: All Channels Off Data Transfer The CLK synchronizes the data transfer with each bit being transmitted on the falling CLK edge and captured on the rising CLK edge in both transmitting and receiving systems ...
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... COM pin. Tables 1 and 2 show the various bit combinations for the LTC1594L/LTC1598L channel selection. Table 1. Logic Table for the LTC1594L Channel Selection CHANNEL STATUS EN D2 All Off ...
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... Data is transmitted in both directions on a single wire. The processor pin connected to this data line should be configurable as either an input or an output. The LTC1594L/LTC1598L will take control of the data line after CS falling and before the 6th falling CLK while the processor takes control of the data line when CS is high ...
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... Figure 5. Use Separate Chip Selects to Maximize Sample Rate MUXOUT/ADCIN Loop Economizes Signal Conditioning The MUXOUT and ADCIN pins of the LTC1594L/LTC1598L form a very flexible external loop that allows Program- mable Gain Amplifier (PGA) and/or processing analog input signals prior to conversion. This loop is also a cost effective way to perform the conditioning, because only one circuit is needed instead of one for each channel ...
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... U APPLICATIONS INFORMATION BOARD LAYOUT CONSIDERATIONS Grounding and Bypassing The LTC1594L/LTC1598L are easy to use if some care is taken. They should be used with an analog ground plane and single point grounding techniques. The GND pin should be tied directly to the ground plane. The V pin should be bypassed to the ground plane with tantalum capacitor with leads as short as possible ...
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... Source Resistance The analog inputs of the LTC1594L/LTC1598L look like a 20pF capacitor ( channel resistance as shown in Figure 8. C switched between the selected “analog” and “COM” ...
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... Conversion speed (CLK frequency Offset with Reduced V The offset of the LTC1594L/LTC1598L has a larger effect on the output code when the ADCs are operated with reduced reference voltage. The offset (which is typically a fixed voltage) becomes a larger fraction of an LSB as the size of the LSB is reduced. The typical curve of Change in ...
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... ADC and is directly related to S/( the equation: ENOB = [S/( – 1.76]/6.02 where S/( expressed in dB. At the maximum sampling rate of 10.5kHz with a 5V supply, the LTC1594L/ LTC1598L maintain above 10.7 ENOBs at 10kHz input frequency. Above 10kHz the ENOBs gradually decline, as shown in Figure 11, due to increasing second harmonic distortion ...
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... U U APPLICATIONS INFORMATION specification in the Dynamic Accuracy table includes the 2nd through 5th harmonics. With a 1kHz input signal, the LTC1594L/LTC1598L have typical THD of 78dB with V = 2.7V. CC Intermodulation Distortion If the ADC input signal consists of more than one spectral component, the ADC transfer function nonlin- earity can produce intermodulation distortion (IMD) in addition to THD ...
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... LTC1594L/LTC1598L U TYPICAL APPLICATIONS LDA #$52 Configuration data for serial peripheral control register (Interrupts disabled, output enabled, master, Norm = Clk/16) STA $0A Load configuration data into location $0A (SPCR) LDA #$FF Configuration data for I/O ports (all bits are set as outputs) STA $04 Load configuration data into Port A DDR ($04) ...
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... C3 0 ADCIN V V REF CC 10 CSADC 6 CSMUX 12-BIT 5, 14 SERIAL DATA LINK CLK + SAMPLING 7 MICROWIRE AND SPI D ADC IN COMPATIBLE 11 – D OUT GND 4, 9 1594L/98L TA05 LTC1594L/LTC1598L offset sine input 1/2 LT1368 0.015 – 0 ...
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... Combined with the LTC1391, the system can expand to eight channels and eight gains for each channel. Using the LTC1594L, the PGA is reduced to four gains. The output of the LT1368 drives the ADCIN and the resistor ladder. The resistors above the selected MUX channel form the feedback for the LT1368 ...
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... TYP 0.014 – 0.019 (0.355 – 0.483) TYP LTC1594L/LTC1598L 8.07 – 8.33* (0.318 – 0.328 7.65 – 7.90 (0.301 – 0.311) 1.73 – 1.99 (0.068 – 0.078) 0.05 – 0.21 (0.002 – ...
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... LTC1594L/LTC1598L U TYPICAL APPLICATION Using the LTC1598L and LTC1391 as an 8-Channel Differential 12-Bit ADC System 1 F LTC1391 CH0 CH0 2 CH1 3 V – CH2 4 CH3 D OUT 5 CH4 CH5 CS 7 CH6 CLK 8 CH7 CH7 GND D IN CLK CS D OUT = DAISY CHAIN CONFIGURATION FOR THE LTC1391 AND THE LTC1598L ...