MC74ACT373 ON Semiconductor, MC74ACT373 Datasheet
MC74ACT373
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MC74ACT373 Summary of contents
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... MC74AC373, MC74ACT373 Octal Transparent Latch with 3−State Outputs The MC74AC373/74ACT373 consists of eight latches with 3−state outputs for bus organized system applications. The flip−flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW ...
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... NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MC74AC373, MC74ACT373 The MC74AC373/74ACT373 contains eight D−type latches with 3−state standard outputs. When the Latch O n Enable (LE) input is HIGH, data on the D Z latches. In this condition the latches are transparent, i.e latch output will change state each time its D input changes ...
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... Data Sheets for devices that differ from the typical input rise and fall times from 0 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. IN MC74AC373, MC74ACT373 Parameter Parameter ′AC ′ACT ...
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... NOTE: I and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5 MC74AC373, MC74ACT373 74AC +25°C A −40°C to +85°C ...
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... AC OPERATING REQUIREMENTS Symbol Parameter Setup Time, HIGH or LOW Hold Time, HIGH or LOW Pulse Width, HIGH w *Voltage Range 3 3.3 V ±0.3 V. Voltage Range 5 5.0 V ±0.5 V. MC74AC373, MC74ACT373 74AC T = +25° ( Min Typ Max 3.3 1.5 10 13.5 5.0 1 ...
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... Dynamic OLD Output Current I OHD I Maximum Quiescent CC Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. MC74AC373, MC74ACT373 74ACT 74ACT +25°C A (V) −40°C to +85°C Typ Guaranteed Limits 4 ...
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... Setup Time, HIGH or LOW Hold Time, HIGH or LOW Pulse Width, HIGH w *Voltage Range 5 5.0 V ±0.5 V. CAPACITANCE Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD MC74AC373, MC74ACT373 (V) Min 5.0 2.5 5.0 2.0 5.0 2.5 5.0 2.0 5.0 2.0 5.0 2.0 5.0 2.5 5.0 1.5 (For Figures and Waveforms − See AND8277/D at www.onsemi.com) ...
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... MC74AC373MELG MC74ACT373MEL MC74ACT373MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These packages are inherently Pb−Free. MC74AC373, MC74ACT373 Package PDIP−20 PDIP−20 (Pb−Free) PDIP−20 PDIP−20 (Pb− ...
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... PDIP− MC74AC373N AWLYYWWG MC74ACT373N AWLYYWWG 1 1 MC74AC373, MC74ACT373 MARKING DIAGRAMS SOIC−20W TSSOP− AC373 373 AWLYYWWG ALYWG ACT ACT373 373 AWLYYWWG ALYWG Assembly Location WL Wafer Lot YY Year WW Work Week Pb− ...
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... PLANE 0.25 (0.010 20X 0. 18X A1 MC74AC373, MC74ACT373 PACKAGE DIMENSIONS PDIP−20 N SUFFIX PLASTIC DIP PACKAGE CASE 738−03 ISSUE 0.25 (0.010 SOIC−20W DW SUFFIX CASE 751D−05 ...
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... G D 0.100 (0.004) −T− SEATING PLANE 16X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MC74AC373, MC74ACT373 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX CASE 948E−02 ISSUE ...
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... Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com MC74AC373, MC74ACT373 PACKAGE DIMENSIONS SOEIAJ−20 M SUFFIX CASE 967−01 ...