mm74hct273 Fairchild Semiconductor, mm74hct273 Datasheet
mm74hct273
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mm74hct273 Summary of contents
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... MM74HCT273 Octal D-Type Flip-Flop with Clear General Description The MM74HCT273 utilizes advanced silicon-gate CMOS technology. It has an input threshold and output drive simi- lar to LS-TTL with the low standby power of CMOS. These positive edge-triggered flip-flops have a common clock and clear-independent Q outputs. Data input, ...
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Truth Table Clear HIGH Level (steady-state) L LOW Level (steady-state) X Don’t Care n Transition from LOW-to-HIGH level Q0 The level of Q before the indicated steady-state input conditions were established. Logic Diagram www.fairchildsemi.com (Each ...
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Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage ( OUT Clamp Diode Current ( ...
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AC Electrical Characteristics Symbol Parameter f Maximum Operating Frequency MAX Maximum Propagation Delay from Clock to Q PHL PLH ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...