nb4n507a ON Semiconductor, nb4n507a Datasheet

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nb4n507a

Manufacturer Part Number
nb4n507a
Description
3.3v / 5v 50mhz To 200mhz Pecl Clock Synthesizer
Manufacturer
ON Semiconductor
Datasheet

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NB4N507A
3.3V/5V, 50 MHz to 200 MHz
PECL Clock Synthesizer
Description
very low jitter differential PECL output clock. It produces a clock
output based on an integer multiple of an input reference frequency.
using Phase-Locked-Loop (PLL) techniques, will produce output
clocks up to 200 MHz. In addition, the PLL circuitry will produce a
50% duty cycle square-wave clock output (see Figure 7).
reference frequency multiples. An exact 155.52 MHz output clock can
be generated from a 19.44 MHz crystal and the x8 multiplier selection.
The NB4N507A is intended for low output jitter clock generation.
and AC terminated. See Figures 4 and 6.
Features
*For additional information on our Pb-Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2007
September, 2007 - Rev. 3
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The NB4N507A is a precision clock synthesizer which generates a
The NB4N507A accepts a standard fundamental mode crystal,
The NB4N507A can be programmed to generate a selection of input
The PECL outputs are 15 mA open collector and must be DC loaded
Input Crystal Frequency of 10 - 27 MHz
Enable Usage of Common Low-Cost Crystal
Differential PECL Output Clock Frequencies up to 200 MHz
Duty Cycle of 48%/52%
Operating Range: V
Ideal for SONET Applications and Oscillator Manufacturers
Available in Die Form
Packaged in 16-Pin Narrow SOIC
Pb-Free Packages are Available*
Osc
Figure 1. Simplified Logic Block Diagram
CC
PD
= 3.0 V to 5.5 V
CP
VCO
S0
Mult
S1
PECL
1
OE
CLKOUT
CLKOUT
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
A
WL
Y
WW
G
MARKING DIAGRAM
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
NB4N507AG
CASE 751B
D SUFFIX
AWLYWW
SOIC-16
Publication Order Number:
NB4N507A/D

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nb4n507a Summary of contents

Page 1

... MHz. In addition, the PLL circuitry will produce a 50% duty cycle square-wave clock output (see Figure 7). The NB4N507A can be programmed to generate a selection of input reference frequency multiples. An exact 155.52 MHz output clock can be generated from a 19.44 MHz crystal and the x8 multiplier selection. ...

Page 2

... GND CLKOUT 8 Figure 3. 16-Pin SOIC (Top View) NB4N507A Phase Charge VCO Detector Pump Figure 2. NB4N507A Logic Diagram Table 1. CLOCK MULTIPLIER SELECT TABLE *Example Crystal = 16 MHz GND 9 CLKOUT OPEN Table 2. OE, OUTPUT ENABLE FUNCTION http://onsemi ...

Page 3

... Crystal or Clock Input Positive Supply Voltage (3 5.5 V) Multiplier Select Pin; When Left Open, Defaults to V Negative Supply Voltage Pin 10 does not require an external resistor. The NB4N507A will function with or without a resistor on Pin 10. Non-inverted differential PECL clock output. Inverted differential PECL clock output. ...

Page 4

... X1 to ground and X2 to ground. The value of these capacitors is given by the following equation, where CL is the specified crystal load capacitance: Crystal caps (pF) = (CL- So, for a crystal with 16 pF load capacitance, use two 22 pF caps, including board trace capacitance (see Figure 7). 8. Guaranteed by design and characterization. NB4N507A = 3 5.5 V, GND = -40°C to +85°C (Note 3)) DD ...

Page 5

... NB4N507A GND Figure 4. Output Structure V DD NB4N507 PECL Driver GND Figure 5. Evaluation Test Load for the NB4N507A NB4N507A GND = 0 V Figure 6. Alternate Termination for Output Driver and Device Evaluation http://onsemi.com Current Source ...

Page 6

... NB4N507A, along with a low frequency fundamental mode crystal, can build a high frequency differential PECL output oscillator. For example MHz crystal connected to the NB4N507A with the 12X output selected ( produces a 120 MHz PECL output clock. Crystal Oscillator Input Interface The NB4N507A features an integrated crystal oscillator to minimize system implementation costs ...

Page 7

... NB4N507A Resource Reference of Application Notes AND8001/D - Odd Number Counters Design AND8002/D - Marking and Date Codes AND8020/D - Termination of ECL Logic Devices AND8066/D - Interfacing with ECLinPS AND8090 Characteristics of ECL Devices http://onsemi.com 7 ...

Page 8

... C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB4N507A ...

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