PCF8584 NXP Semiconductors, PCF8584 Datasheet
PCF8584
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PCF8584 Summary of contents
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... DATA SHEET PCF8584 2 I C-bus controller Product specification Supersedes data of 1997 Mar 19 File under Integrated Circuits, IC12 INTEGRATED CIRCUITS 1997 Oct 21 ...
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... Application Notes 15 PACKAGE OUTLINES 16 SOLDERING 16.1 Introduction 16.2 DIP 16.2.1 Soldering by dipping or by wave 16.2.2 Repairing soldered joints 16.3 SO 16.3.1 Reflow soldering 16.3.2 Wave soldering 16.3.3 Repairing soldered joints 17 DEFINITIONS 18 LIFE SUPPORT APPLICATIONS 19 PURCHASE OF PHILIPS I 2 C-bus interface 2 Product specification PCF8584 C-BUS TIMING DIAGRAMS C-BUS TIMING SPECIFICATIONS 2 C COMPONENTS ...
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... PCF8584T SO20 plastic small outline package; 20 leads; body width 7.5 mm 1997 Oct 21 2 GENERAL DESCRIPTION The PCF8584 is an integrated circuit designed in CMOS technology which serves as an interface between most standard parallel-bus microcontrollers/microprocessors 2 and the serial I C-bus. The PCF8584 provides both master and slave functions. ...
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... CONTROL STATUS REGISTER S1 AD0/ PIN 0 STS BER LRB PARALLEL BUS CONTROL ( (R/W) RD (DTACK) Fig.1 Block diagram. 4 Product specification PCF8584 V DB3 DB2 DB1 DB0 read only write only (1) X LSB default: 00H 80XX 0FH 68XXX ...
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... WR is the write control input for MAB8048, MAB8051, or Z80-types (internal pull-up). R/W control input for 68000-types. Reset input (open-drain); this input forces the I state; all flags are reset, except PIN, which is set. Also functions as strobe output. supply voltage 5 Product specification DESCRIPTION 2 C-bus controller into a predefined PCF8584 ...
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... 68000 19 RESET / STROBE Z80 ( (R/ The structure of the PCF8584 is similar to that of the ( (DTACK C-bus interface section of the Philips’ MABXXXX/PCF84(C)XX-series of microcontrollers, but 15 DB7 with a modified control structure. The PCF8584 has five 14 DB6 internal register locations. Three of these (own address ...
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... Fig.3 68000/80XX timing sequence utilized by the Interface Mode Control (IMC). 1997 Oct 21 ENRD A0 WR/ RD/ INT R/W DTACK mode select mode select 7 Product specification 2 I C-bus SCL (1.5 MHz) DIVIDER SIO DIVIDER (S24, S23, S22) (S21 and S20) / MBE706 IACK CLK (50 : 50) mode locked (1) (2) MBE707 PCF8584 ...
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... DB0) when an interrupt acknowledge signal is asserted and the ENI (enable interrupt) flag is set. Default vector values are: Vector is ‘00H’ in 80XX mode Vector is ‘0FH’ in 68000 mode. On reset the PCF8584 is in the 80XX mode, thus the ). default interrupt vector is ‘00H’. clk 6.7 ...
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... In the transmitter mode data is transmitted to the I enabled (ESO = 1). Remarks minimum of 6 clock cycles must elapse between consecutive parallel-bus accesses to the PCF8584 when the 2 I C-bus controller operates MHz. This may be reduced to 3 clock cycles for lower operating frequencies. ...
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... C-bus I/O. When ESO is LOW, register access for initialization is possible. When ES2 IACK ( ( ( ( Product specification PCF8584 2 C-bus operation; see FUNCTION R/W S1: control R/W S0': (own address) R/W S3: (interrupt vector) R/W S2: (clock register) W S1: control R S1; status R/W S0: (data) R/W S3: (interrupt vector) R S3: (interrupt vector ACK cycle)) ...
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... Table 6 Register access control; ESO = 1 (serial interface on) and ES1 = 1; long-distance (4-wire) mode; note 1 INTERNAL REGISTER ADDRESSING: LONG-DISTANCE (4-WIRE) MODE A0 ES1 Note 1. Trying to read from or write to registers other than S0 and S1 (setting ESO = 0) brings the PCF8584 out of the long-distance mode. Table 7 Instruction table for serial bus control STA STO ...
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... C-bus controller 6.8.2.1 PIN bit ‘Pending Interrupt Not’ (MSB of register S1 status flag which is used to synchronize serial communication and is set to logic 0 whenever the PCF8584 requires servicing. The PIN bit is normally read in polled applications to 2 determine when an I C-bus byte transmission/reception is completed. The PIN bit may also be written, see Section 6 ...
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... For more detailed information on the strobe function see Section 6.12. 6.11 Comparison to the MAB8400 I The structure of the PCF8584 is similar to that of the MAB8400 series of microcontrollers, but with a modified control structure. Access to all I registers is done via the parallel-bus port in conjunction with register select input A0, and control bits ESO, ES1 and ES2 ...
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... Before entering the long-distance mode, ENI must be set to logic 0. When powering up an PCF8584-node in long-distance mode, the PCF8584 must be isolated from the 4-wire bus via 3-state line drivers/receivers until the PCF8584 is properly initialized for long-distance mode. Failure to implement this precaution will result in system malfunction ...
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... C-bus into idle mode; SDA and SCL are HIGH. The next write or read operation will be to/from data transfer register LOW. On power-on PCF8584 node is powered-up slightly after another node has already begun C-bus transmission, the bus busy condition will not have been detected ...
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... Load 'slave address' into S0 register: 'slave address' = value of slave address (7-bits + R/W = 0). After reset, default = ' HIGH Load C5H into S1. 'C5H' = PCF8584 generates the 'START' condition and clocks out the slave register S1 address and the clock pulse for slave acknowledgement. Next byte(s) sent to the S0 register will be immediately ...
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... S1 status register no no PIN = 0? (an error has occured) send byte C3H to S1 read final data byte from S0 register A0 = LOW (1) Fig.7 PCF8584 master receiver mode. 17 Product specification R C-bus and A0 = HIGH Set ACK bit preparation for negative acknowledgement ...
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... A0 = HIGH send byte 45H A0 = LOW END MBE712 18 Product specification Load 45H into the S1 register; PCF8584 generates the repeated 'START condition' only. The current contents of register S0 is NOT 2 clocked out onto the I C-bus. The next byte sent to register S0 should be the 'slave address' read bit ...
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... S0 register R read or write? (LSB = HIGH yes A0 = LOW no PIN deactivated (set to '1') PCF8584 goes into slave receiver mode Fig.9 Slave receiver/slave transmitter modes. 19 Product specification PCF8584 A0 = HIGH Check whether 'addressed as slave' Check that 'own address' ...
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... Philips Semiconductors 2 I C-bus controller C-BUS TIMING DIAGRAMS The diagrams (Figs 10 to 13) illustrate typical timing diagrams for the PCF8584 in master/slave functions. For detailed 2 description of the I C-bus protocol, please refer to “The I ordering number 9398 393 40011. handbook, full pagewidth SDA SCL ...
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... SDA SCL INT 7-bit address (62H) R START ACK condition from slave PCF8584 Slave PCF8584 is written to by external master transmitter. 1997 Oct 21 interrupt first-byte: 1FH ACK Fig.12 Bus timing diagram; slave transmitter mode. interrupt first-byte (CCH) ACK Fig.13 Bus timing diagram; slave receiver mode. ...
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... HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However totally safe good practice to take normal precautions appropriate to handling MOS devices (see “Handling MOS Devices” ). 1997 Oct 21 PARAMETER 22 Product specification PCF8584 MIN. MAX. UNIT 0.3 +7 ...
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... 3-state, SDA, SCL, INT, RD, RESET. 1997 Oct 21 CONDITIONS standby; note 1 operating; notes 1 and AND note 3 note 3 note 4 note note 5 amb V = 2.4 V; note 6 and 0.4 V; note 6 OL note 8 23 Product specification PCF8584 MIN. TYP. MAX. 4.5 5.0 5.5 2.5 1.5 0 0.8 2 0. 100 2 ...
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... Fig.15 and note 1 20 see Fig.16 see Fig.15 see Fig.15 see Fig.16 see Fig.15 see Fig.16 see Fig.15 see Fig.16 see Fig.15 see Fig.16 see Fig.15 see Fig.16 24 Product specification PCF8584 = DD. MIN. TYP. MAX. 100 100 4.7 4.7 4.0 4.7 4 ...
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... Fig.17 0 see Figs 19 and 20 see Figs 19 and 20 see Fig.20 230 see Fig.20 see Fig.20 see Fig.21 30t CLK see Fig.22 8t CLK see Figs 17 and 18 25 Product specification PCF8584 TYP. MAX. UNIT 160 180 150 ns CLK CLK ns ...
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... MLA014 - 1 1997 Oct 21 t CLK 35.5 ns 35.5 ns min min max 6 ns max Fig.14 Clock input timing. t CLWL t AVWL t WLWH DATA VALID t DVWH Fig.15 Bus timing (80XX mode); write cycle. 26 Product specification PCF8584 t f MLA013 - 1 t WHCH t WHAI t WHDI ...
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... Oct 21 t CLRL t AVRL t RLRH DATA VALID t RLDV Fig.16 Bus timing (80XX mode); read cycle. t AVCL t WLCL t CLCL DATA VALID t DVCL t CLDL Fig.17 Bus timing (68000 mode); write cycle. 27 Product specification PCF8584 t RHCH t RHAI t RHDF t CHAI t CHWH t CHDI t CHDE ...
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... MLA016 - 1 INT IACK 1997 Oct 21 t AVCL t RHCL t CLCL DATA VALID t CLDV t CLDL Fig.18 Bus timing (68000 mode); read cycle. t ALIE t ALAE t ALDV DATA VALID Fig.19 Interrupt timing (80XX mode). 28 Product specification PCF8584 t CHAL t CHRL t CHDF t CHDE t AHDI MLA018 - 1 ...
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... Philips Semiconductors 2 I C-bus controller handbook, full pagewidth INT IACK DTACK CLK RESET 1997 Oct 21 t ALIE t ALAE t ALDV DATA VALID t ALDL Fig.20 Interrupt timing (68000 mode Fig.21 Reset timing. 29 Product specification PCF8584 t AHDI t AHDE MLA019 - 1 MLA020 - 1 ...
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... Philips Semiconductors 2 I C-bus controller CLK STROBE 1997 Oct Fig.22 Strobe timing. 30 Product specification PCF8584 MLA021 - 1 ...
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... Philips Semiconductors 2 I C-bus controller 14 APPLICATION INFORMATION 8048/8051 1997 Oct 21 ADDRESS BUS A0 DECODER CS ALE DATA RD WR INT Fig.23 Application diagram using the 8048/8051. 31 Product specification PCF8584 SCL PCF8584 SDA MBE704 ...
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... Philips Semiconductors 2 I C-bus controller 68000 1997 Oct 21 AS UDS CS DECODER LDS ADDRESS A1 A1, A2, A3 IACK FCX INTERRUPT HANDLER IPX INT R/W DTACK DATA Fig.24 Application diagram using the 68000. 32 Product specification PCF8584 SCL PCF8584 SDA MBE702 ...
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... Philips Semiconductors 2 I C-bus controller 1997 Oct 21 ADDRESS BUS DECODER CS ALE IOR 8088 IOW DATA INTR INT IACK Fig.25 Application diagram using the 8088. 33 Product specification A0 SCL PCF8584 SDA MBE703 PCF8584 ...
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... Maximum forward current: 5 mA; maximum reverse voltage 14.1 Application notes Additional application notes are available from Philips Semiconductors: 1. AN95068: “C Routines for the PCF8584”. 2. AN96040: “Using the PCF8584 with non-specified timings and other frequently asked questions” AN90001: “Interfacing PCF8584 I 1997 Oct 21 Substrate CLK ...
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... 1.73 0.53 0.36 26.92 6.40 1.30 0.38 0.23 26.54 6.22 0.068 0.021 0.014 1.060 0.25 0.051 0.015 0.009 1.045 0.24 REFERENCES JEDEC EIAJ SC603 35 Product specification 3.60 8.25 10.0 2.54 7.62 3.05 7.80 8.3 0.14 0.32 0.39 0.10 0.30 0.12 0.31 0.33 EUROPEAN PROJECTION PCF8584 SOT146 ( max. 0.254 2.0 0.01 0.078 ISSUE DATE 92-11-17 95-05-24 ...
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... REFERENCES JEDEC EIAJ MS-013AC detail 1.1 1.1 0.25 0.25 1.4 0.4 1.0 0.043 0.043 0.055 0.01 0.01 0.016 0.039 EUROPEAN PROJECTION Product specification PCF8584 SOT163 ( 0.9 0.1 0 0.035 0.004 0.016 ISSUE DATE 95-01-24 97-05-22 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 37 Product specification PCF8584 ...
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... Philips. This specification can be ordered using the code 9398 393 40011. 1997 Oct 21 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 38 Product specification PCF8584 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors 2 I C-bus controller 1997 Oct 21 NOTES 39 Product specification PCF8584 ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, ...