PIC16F628A-I/SO Microchip Technology, PIC16F628A-I/SO Datasheet - Page 66

IC MCU FLASH 2KX14 EEPROM 18SOIC

PIC16F628A-I/SO

Manufacturer Part Number
PIC16F628A-I/SO
Description
IC MCU FLASH 2KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F628A-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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outputs may also be directly output to the RA3 and RA4
PIC16F627A/628A/648A
10.5
The comparator outputs are read through the CMCON
register. These bits are read-only. The comparator
I/O pins. When the CM<2:0> = 110 or 001, multiplexors
in the output path of the RA3 and RA4/T0CK1/CMP2
pins will switch and the output of each pin will be the
unsynchronized
uncertainty of each of the comparators is related to the
input offset voltage and the response time given in the
specifications. Figure 10-3 shows the comparator output
block diagram.
The TRISA bits will still function as an output enable/
disable for the RA3/AN3/CMP1 and RA4/T0CK1/
CMP2 pins while in this mode.
FIGURE 10-3:
DS40044G-page 66
To RA3/AN3/CMP1 or
RA4/T0CK1/CMP2 pin
CMCON<7:6>
Note 1: When reading the PORT register, all pins
Set CMIF bit
To Data Bus
RD CMCON
2: Analog levels on any pin that is defined as
Comparator Outputs
CnI
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input, according to the
Schmitt Trigger input specification.
a digital input may cause the input buffer
to consume more current than is
specified.
NV
From other Comparator
output
MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM
of
the
comparator.
The
Q
Q
EN
D
CL
EN
D
Reset
© 2009 Microchip Technology Inc.
Q3
Q1
CnV
OUT

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