PIC16F724-I/ML Microchip Technology, PIC16F724-I/ML Datasheet - Page 261

• Manufacturer Part Number: PIC16F724-I/ML
• Description: IC PIC MCU FLASH 4KX14 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F724-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 36
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Reset................................................................................... 33
Resets
Revision History ................................................................ 253
S
S (Start) bit ........................................................................ 187
SMP bit ..................................................................... 175, 187
Software Simulator (MPLAB SIM)..................................... 208
SPBRG ............................................................................. 156
SPBRG Register ................................................................. 25
Special Event Trigger........................................................ 102
Special Function Registers ................................................. 20
Special Function Registers (SFRs) ..................................... 24
SPI Mode .......................................................................... 173
SSP ................................................................................... 167
SSPADD Register ............................................................... 25
SSPBUF Register ............................................................... 24
SSPCON Register .............................................. 24, 174, 186
SSPEN bit ................................................................. 174, 186
SSPM bits ................................................................. 174, 186
SSPMSK Register............................................................... 25
SSPOV bit ................................................................. 174, 186
SSPSTAT Register ............................................. 25, 175, 187
STATUS Register ............................................................... 27
Synchronous Serial Port Enable bit (SSPEN)........... 174, 186
Synchronous Serial Port Mode Select bits (SSPM) .. 174, 186
T
T1CON Register ......................................................... 24, 124
T1GCON Register............................................................. 125
T2CON Register ................................................. 24, 128, 176
Thermal Considerations .................................................... 221
Time-out Sequence............................................................. 38
Timer0 ............................................................................... 111
Timer1 ............................................................................... 115
© 2007 Microchip Technology Inc.
Associated Registers .................................................. 42
Associated Registers ................................................ 176
Typical Master/Slave Connection ............................. 167
I
Master Mode ............................................................. 169
SPI Mode .................................................................. 167
Typical SPI Master/Slave Connection....................... 167
TMR1ON Bit.............................................................. 125
Associated Registers ................................................ 113
Interrupt..................................................................... 113
Operation .......................................................... 111, 116
Specifications............................................................ 230
Associated registers.................................................. 126
Asynchronous Counter Mode ................................... 117
Interrupt..................................................................... 120
Modes of Operation .................................................. 116
Module On/Off (TMR1ON Bit)................................... 125
Operation During Sleep ............................................ 120
2
C Mode................................................................... 177
Acknowledge .................................................... 178
Addressing ........................................................ 179
Clock Stretching................................................ 184
Clock Synchronization ...................................... 185
Firmware Master Mode ..................................... 184
Hardware Setup ................................................ 177
Multi-Master Mode ............................................ 184
Reception.......................................................... 180
Sleep Operation ................................................ 185
Start/Stop Conditions ........................................ 178
Transmission .................................................... 182
Slave Mode ....................................................... 171
Reading and Writing ......................................... 117
Preliminary
PIC16F72X/PIC16LF72X
Timer2
Timers
Timing Diagrams
Timing Parameter Symbology .......................................... 222
Timing Requirements
TMR0 Register.................................................................... 24
TMR1H Register ................................................................. 24
TMR1L Register.................................................................. 24
TMR2 Register.................................................................... 24
TMRO Register................................................................... 26
TRISA ................................................................................. 54
Oscillator................................................................... 117
Prescaler .................................................................. 117
Specifications ........................................................... 230
Timer1 Gate
TMR1H Register....................................................... 115
TMR1L Register ....................................................... 115
Associated registers ................................................. 128
Timer1
Timer2
A/D Conversion ........................................................ 232
A/D Conversion (Sleep Mode).................................. 233
Asynchronous Reception.......................................... 152
Asynchronous Transmission .................................... 148
Asynchronous Transmission (Back-to-Back)............ 148
Brown-out Reset (BOR)............................................ 228
Brown-out Reset Situations ........................................ 37
CLKOUT and I/O ...................................................... 226
Clock Synchronization .............................................. 185
Clock Timing............................................................. 223
Enhanced Capture/Compare/PWM (ECCP)............. 231
I
I
I
I
I
INT Pin Interrupt ......................................................... 44
Reset, WDT, OST and Power-up Timer ................... 227
Slave Select Synchronization ................................... 173
SPI Master Mode...................................................... 170
SPI Master Mode (CKE = 1, SMP = 1) ..................... 235
SPI Mode (Slave Mode with CKE = 0)...................... 172
SPI Mode (Slave Mode with CKE = 1)...................... 172
SPI Slave Mode (CKE = 0) ....................................... 236
SPI Slave Mode (CKE = 1) ....................................... 236
Synchronous Reception (Master Mode, SREN) ....... 162
Synchronous Transmission ...................................... 160
Synchronous Transmission (Through TXEN) ........... 160
Time-out Sequence
Timer0 and Timer1 External Clock ........................... 230
Timer1 Incrementing Edge ....................................... 120
USART Synchronous Receive (Master/Slave) ......... 234
USART Synchronous Transmission (Master/Slave). 233
Wake-up from Interrupt............................................. 194
I
I2C Bus Start/Stop Bits............................................. 238
SPI Mode.................................................................. 237
2
2
2
2
2
2
C Bus Data............................................................. 238
C Bus Start/Stop Bits ............................................. 237
C Reception (7-bit Address)................................... 180
C Slave Mode with SEN = 0 (Reception,
C Transmission (7-bit Address) ............................. 182
C Bus Data............................................................. 239
Selecting Source .............................................. 118
T1CON ............................................................. 124
T1GCON........................................................... 125
T2CON ............................................................. 128
10-bit Address) ................................................. 181
Case 1 ................................................................ 39
Case 2 ................................................................ 39
Case 3 ................................................................ 39
DS41341A-page 259