PIC18F1230-I/P Microchip Technology, PIC18F1230-I/P Datasheet - Page 63
![IC PIC MCU FLASH 2KX16 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18F1230-I/P
Manufacturer Part Number
PIC18F1230-I/P
Description
IC PIC MCU FLASH 2KX16 18DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18F1230-I/P
Program Memory Type
FLASH
Program Memory Size
4KB (2K x 16)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Height
3.3 mm
Length
22.86 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F1230-I/P
Manufacturer:
MICROCHIP
Quantity:
5
Part Number:
PIC18F1230-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 63 of 318
- Download datasheet (3Mb)
TABLE 6-2:
2009 Microchip Technology Inc.
PTMRL
PTMRH
PTPERL
PTPERH
TRISB
TRISA
PDC0L
PDC0H
PDC1L
PDC1H
PDC2L
PDC2H
FLTCONFIG
LATB
LATA
SEVTCMPL
SEVTCMPH
PWMCON0
PWMCON1
DTCON
OVDCOND
OVDCONS
PORTB
PORTA
Legend:
Note 1:
File Name
2:
3:
4:
5:
6:
7:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is disabled and reads
as ‘0’. See Section 5.4 “Brown-out Reset (BOR)”.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See
Section 3.6.4 “PLL in INTOSC Modes”.
The RA5 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0); otherwise, RA5 reads as
‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
Bit 7 and bit 6 are cleared by user software or by a POR.
Reset condition of PWMEN bits depends on the PWMPIN Configuration bit of CONFIG3L.
This bit has no effect if the Configuration bit, WDTEN, is enabled.
PWM Time Base Register (lower 8 bits)
PWM Time Base Period Register (lower 8 bits)
PORTB Data Direction Control Register
PWM Duty Cycle #0L Register (lower 8 bits)
PWM Duty Cycle #1L Register (lower 8 bits)
PWM Duty Cycle #2L Register (lower 8 bits)
PORTB Output Latch Register (Read and Write to Data Latch)
PWM Special Event Compare Register (lower 8 bits)
SEVOPS3
TRISA7
LATA7
BRFEN
DTPS1
RA7
Bit 7
RB7
—
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F1230/1330) (CONTINUED)
(4)
(4)
(4)
PWMEN2
SEVOPS2
TRISA6
LATA6
DTPS0
RA6
Bit 6
RB6
—
—
—
—
—
—
—
—
—
(4)
(4)
(4)
(6)
PORTA Data Direction Control Register
PWM Duty Cycle #0H Register (upper 6 bits)
PWM Duty Cycle #1H Register (upper 6 bits)
PWM Duty Cycle #2H Register (upper 6 bits)
PORTA Output Latch Register (Read and Write to Data Latch)
PWMEN1
SEVOPS1
POVD5
POUT5
RA5
Bit 5
RB5
DT5
—
—
—
—
(3)
(6)
PWMEN0
SEVOPS0
POVD4
POUT4
Bit 4
DT4
RB4
RA4
—
—
—
—
(6)
PWM Time Base Register (upper 4 bits)
PWM Time Base Period Register (upper 4 bits)
PWM Special Event Compare Register (upper 4 bits)
SEVTDIR
POVD3
POUT3
Bit 3
RB3
RA3
DT3
—
—
PMOD2
POVD2
POUT2
FLTAS
Bit 2
DT2
RB2
RA2
—
PIC18F1230/1330
FLTAMOD
PMOD1
POVD1
POUT1
UDIS
Bit 1
DT1
RB1
RA1
FLTAEN
PMOD0
OSYNC
POVD0
POUT0
Bit 0
DT0
RB0
RA0
DS39758D-page 63
0--- -000
-100 -000
-000 -000
0000 0000
---- 0000
1111 1111
---- 1111
1111 1111
1111 1111
0000 0000
--00 0000
0000 0000
--00 0000
0000 0000
--00 0000
xxxx xxxx
xxxx xxxx
0000 0000
---- 0000
0000 0-00
0000 0000
--11 1111
--00 0000
xxxx xxxx
xx0x xxxx
POR, BOR
Value on
Details
49, 125
49, 125
49, 125
49, 125
49, 131
49, 131
49, 131
49, 131
49, 131
49, 131
49, 143
49, 144
50, 144
50, 123
50, 124
50, 136
50, 140
50, 140
Page:
49, 90
49, 87
49, 90
49, 87
50, 90
50, 87
on
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