PIC16C71-04I/P Microchip Technology, PIC16C71-04I/P Datasheet - Page 2

• Manufacturer Part Number: PIC16C71-04I/P
• Description: IC MCU OTP 1KX14 A/D 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C71-04I/P

• Program Memory Type: OTP
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Ram Size: 36 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 36 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16C712/716
Assembly Code To Start PWM Once Stopped:
PWMrestart
Code Example 1B:
;***********************************************************************
;
;
;
;
;
;
;
;
Assembly Code To Stop CCP Mode Once Started:
CCPstop
Assembly Code To Start CCP Mode Once Stopped:
CCPstart
DS80072D-page 2
Call these routines to turn the CCP Mode off or on and ensure RB3 is a known
CCPstop - First sets RB3 to an Input or an Output. If RB3 is an Output then it’s state is made
CCPstart
bcf
movlw
movwf
return
bsf
bcf
bcf
bcf
movlw
movwf
return
bcf
movlw
movwf
return
Input or Output value when CCP Mode is off.
VALUE FOR CCP1CON.
either High or Low. The CCP is then Disabled.
- Enable CCP Mode. IT IS THE RESPONSIBILITY OF THE USER TO DETERMINE THE CORRECT
STATUS,RP0
T2CONVAL
T2CON
STATUS,RP0
TRISB,3
STATUS,RP0
PORTB,3
0x30
CCP1CON
STATUS,RP0
CCP1CONVAL
CCP1CON
; Select Bank 0
; Load T2CON value in ‘w’ register - USER RESPONSIBLE FOR
; SUPPLYING THE CORRECT T2CON VALUE.
; Initialize T2CON enabling scalers and Timer2
; Select Bank 1
; RB3 as an Output - set bit TRISB, 3 when RB3
; as an Input is desired.
; Select Bank 0
; RB3 as a Low Level Output - Set bit TRISB,3 for
; RB3 to be a High Level
; Output.
; Load CCP1CON value in Working register
; Turn Off CCP1CON all Modes
; Select Bank 0
; Load CCP1CON value in Working register.
; THE USER IS RESPONSIBLE FOR SUPPLYING THE CORRECT CCP1CON VALUE.
; Initialize CCP1CON for desired Mode of operation.
 2003 Microchip Technology Inc.