PIC18F2455-I/SO Microchip Technology, PIC18F2455-I/SO Datasheet
PIC18F2455-I/SO
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PIC18F2455-I/SO Summary of contents
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... The PIC18F2455/2550/4455/4550 parts you have received conform functionally to the Device Data Sheet (DS39632D), except for the anomalies described below. Any Data Sheet Clarification issues related to the PIC18F2455/2550/4455/4550 will be reported in a separate Data Sheet errata. Please check the Microchip web site for any existing issues. The ...
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... PIC18F2455/2550/4455/4550 4. Module: Interrupts If an interrupt occurs during a two-cycle instruction that modifies the STATUS, BSR or WREG register, the unmodified value of the register will be saved to the corresponding Fast Return (Shadow) register and upon a fast return from the interrupt, the unmodified value will be restored to the STATUS, BSR or WREG register ...
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... MyLowISR _endasm } #pragma code /* return to default code section */ © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 directive instructs the compiler to not use the RETFIE FAST instruction. If the proper high priority interrupt bit is set in the IPRx register, then the interrupt is treated as high priority in spite of the pragma interruptlow directive ...
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... PIC18F2455/2550/4455/4550 An optimized C18 version is also provided in Example 3. This example illustrates how it reduces the instruction cycle count from 10 cycles to 3: EXAMPLE 3: #pragma code high_vector_section=0x8 void high_vector (void) { _asm CALL high_vector_branch, 1 _endasm } void high_vector_branch (void) { _asm POP GOTO high_isr _endasm } #pragma interrupt high_isr ...
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... Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 7. Module: ECCP When operating either Timer1 or Timer3 as a counter with a prescale value other than 1:1 and operating the ECCP in Compare mode with the ...
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... Table 1. Work around Three work arounds exist. 1. Configure the A/D to use the V pins for the voltage references. This is done by setting the VCFG<1:0> bits (ADCON1<5:4>). TABLE 1: A/D CONVERTER CHARACTERISTICS: PIC18F2455/2550/4455/4550 (INDUSTRIAL) Param Symbol Characteristic No. A06A E Offset Error ...
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... Idle state for clock (CK low level Work around None. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 14. Module: USB The Ping-Pong Buffer mode in which the ping-pong buffers are enabled for Endpoints (UCFG<PPB1:PPB0> = 11) is not supported. Work around Use other Ping-Pong Buffer modes ...
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... PIC18F2455/2550/4455/4550 17. Module: MSSP It has been observed that following a Power-on 2 Reset mode may not initialize properly by just configuring the SCL and SDA pins as either inputs or outputs. This has only been seen in a few unique system environments. A test of a statistically significant sample of pre- ...
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... WUE bit is automatically cleared. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 23. Module: Timer1 In 16-Bit Asynchronous Counter mode (with or without use of the Timer1 oscillator), the TMR1H and TMR3H buffers do not update when TMRxL is read ...
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... PIC18F2455/2550/4455/4550 26. Module: MSSP With MSSP in SPI Master mode, F Timer2/2 clock rate and CKE = 0, a write collision may occur if SSPBUF is loaded immediately after the transfer is complete. A delay may be required after the MSSP Interrupt Flag bit, SSPIF, is set or the Buffer Full bit, BF, is set, and before writing SSPBUF ...
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... RC modes. OSC Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 31. Module: Brown-out Reset (BOR) If either the HLVD or USB modules are enabled, clearing the SBOREN bit (RCON<6>) when the soft- ware controlled (BOREN1:BOREN0 = 01) may cause a Brown-out Reset (BOR) event ...
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... PIC18F2455/2550/4455/4550 REVISION HISTORY Rev A Document (11/2004) Original version of this document. Includes silicon issues 1 (EUSART), 2 (Timer1/Timer3), 3 (MSSP), 4 (Interrupts), 5-7 (ECCP), 8 (A/D) and 9 (DC Characteristics (BOR)). Rev B Document (07/2005) Added silicon issue 10 (USB). Rev C Document (11/2005) Updated issue 4 (Interrupts) and added silicon issue 11 (PORTD) ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...