PIC18F2525-I/SO Microchip Technology, PIC18F2525-I/SO Datasheet

IC MCU FLASH 24KX16 28SOIC

PIC18F2525-I/SO

Manufacturer Part Number
PIC18F2525-I/SO
Description
IC MCU FLASH 24KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2525-I/SO

Program Memory Type
FLASH
Program Memory Size
48KB (24K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3DB18F4620 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2525-I/SO
Manufacturer:
HITTITE
Quantity:
101
The PIC18F2525/2620/4525/4620 Rev. A3 parts you
have received conform functionally to the Device Data
Sheet (DS39626), except for the anomalies described
below. Any Data Sheet Clarification issues related to
the PIC18F2525/2620/4525/4620 will be reported in a
separate Data Sheet errata. Please check the
Microchip web site for any existing issues.
The
PIC18F2525/2620/4525/4620 devices with these
Device/Revision IDs:
TABLE 1:
© 2006 Microchip Technology Inc.
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
Note 1:
Part Number
PIC18F2525
PIC18F2620
PIC18F4525
PIC18F4620
following
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
F
OSC
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
PIC18F2525/2620/4525/4620 Rev. A3 Silicon Errata
3FFFFEh:3FFFFFh
I
2
2
C™ interface does not conform to the 400 kHz I
C™ CLOCK RATE w/BRG
silicon
00 1100 100
00 1100 010
00 1100 000
00 1100 110
Device ID
errata apply
10 MHz
10 MHz
10 MHz
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
F
CY
in
PIC18F2525/2620/4525/4620
Revision ID
the
00011
00011
00011
00011
only
device’s
to
20 MHz
20 MHz
20 MHz
F
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
CY
* 2
1. Module: MSSP
2
C specification (which applies to rates greater than
SSPADD = INT((F
In its current implementation, the I
mode operates as follows:
a)
b)
Date Codes that pertain to this issue:
All engineering and production devices.
The Baud Rate Generator for I
mode is slower than the rates specified in
Table 17-3 of the Device Data Sheet.
For this revision of silicon, use the values
shown in Table 1 in place of those shown in
Table 17-3 of the Device Data Sheet. The
differences are shown in bold text.
Use the following formula in place of the
one shown in Register 17-4 (SSPCON1) of
the Device Data Sheet for bit description
SSPM3:SSPM0 = 1000.
BRG Value
0Eh
15h
59h
05h
08h
23h
01h
08h
00h
CY
/F
SCL
) – (F
(2 Rollovers of BRG)
CY
/1.111 MHz)) – 1
400 kHz
400 kHz
333 kHz
312.5 kHz
DS80200D-page 1
1 MHz
100 kHz
308 kHz
100 kHz
100 kHz
2
F
C in Master
2
SCL
C™ Master
(1)
(1)
(1)
(1)

Related parts for PIC18F2525-I/SO

PIC18F2525-I/SO Summary of contents

Page 1

... Device Data Sheet (DS39626), except for the anomalies described below. Any Data Sheet Clarification issues related to the PIC18F2525/2620/4525/4620 will be reported in a separate Data Sheet errata. Please check the Microchip web site for any existing issues. The ...

Page 2

... PIC18F2525/2620/4525/4620 2. Module: MSSP When the MSSP is configured for SPI™ Master mode, the SDO pin cannot be disabled by setting the TRISC<5> bit. The SDO pin always outputs the content of SSPBUF regardless of the state of the TRIS bit. Work around Use Rev. A4 silicon devices. ...

Page 3

... None. Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 8. Module: ECCP and CCP The CCP1 and CCP2 configured for PWM mode, with 1:1 Timer2 prescaler and duty cycle set to the period minus 1, may result in the PWM output(s) remaining at a logic low level ...

Page 4

... Increase system clock speed to 40 MHz and adjust A/D settings accordingly. Higher system clock frequencies decrease offset error. Date Codes that pertain to this issue: All engineering and production devices. TABLE 2: A/D CONVERTER CHARACTERISTICS: PIC18F2525/2620/4525/4620 (INDUSTRIAL) Param Symbol Characteristic No. A06A E Offset Error ...

Page 5

... T1CKPS1:T1CKPS0 bit values. Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 15. Module: ECCP When a shutdown condition occurs, the output port(s) is made inactive for the duration of the event. After the event that caused the shutdown ...

Page 6

... PIC18F2525/2620/4525/4620 18. Module: EUSART When performing back-to-back transmission in 9-bit mode (TX9D bit in the TXSTA register is set), the second byte may be corrupted written into TXREG immediately after the TMRT bit is set. Work around Execute a software delay, at least one half the transmission’s bit time, after TMRT is set and prior to writing subsequent bytes into TXREG ...

Page 7

... ISR code here : RETFIE FAST © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 Work around 1. Assembly Language Programming any two-cycle instruction is used to modify the WREG, BSR or STATUS register, do not use the RETFIE FAST instruction to return from the interrupt. Instead, save/restore WREG, BSR and STATUS via software per Example 8-1 in the Device Data Sheet ...

Page 8

... PIC18F2525/2620/4525/4620 2. C Language Programming: The exact work around depends on the compiler in use. Please refer to your C compiler documentation for details. If using the Microchip MPLAB piler, define both high and low priority interrupt handler functions as “low priority” by using the pragma interruptlow directive. This direc- ...

Page 9

... Example 4. This example illustrates how it reduces the instruction cycle count from 10 cycles to 3: EXAMPLE 4: #pragma code high_vector_section=0x8 void high_vector (void) { _asm CALL high_vector_branch, 1 _endasm } void high_vector_branch (void) { _asm POP GOTO high_isr _endasm } #pragma interrupt high_isr void high_isr (void) { ... } © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 DS80200D-page 9 ...

Page 10

... PIC18F2525/2620/4525/4620 24. Module: EUSART The EUSART auto-baud feature may periodically measure the incoming baud rate incorrectly. The rate of incorrect baud rate measurements will depend on the frequency of the incoming synchronization byte and the system clock frequency. Work around None. Date Codes that pertain to this issue: All engineering and production devices ...

Page 11

... SSPOV bit is clear before disabling the module. Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 33. Module: MSSP (SPI Mode) When the SPI is using Timer2/2 as the clock source, a shorter than expected SCK pulse may occur on the first bit of the transmitted/received data (Figure 1) ...

Page 12

... PIC18F2525/2620/4525/4620 34. Module: EUSART In rare situations, one or more extra zero bytes have been observed in a packet transmitted by the module operating in asynchronous mode. The actual data is not lost or corrupted; only unwanted (extra) zero bytes are observed in the packet. This situation has only been observed when the ...

Page 13

... Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 40. Module: MSSP In SPI mode, the SDO output may change after the inactive clock edge of the bit ‘0’ output. This may affect some SPI components that read data over 300 ns after the inactive edge of SCK ...

Page 14

... PIC18F2525/2620/4525/4620 42. Module: MSSP The MSSP configured for SPI mode, the Buffer Full Status bit, BF (SSPSTAT<0>) should not be polled in software to determine when the transfer is complete. Work around Copy the SSPSTAT register into a variable and perform the bit test on the variable. In Example 6, SSPSTAT is copied into the working register where the bit test is performed ...

Page 15

... Asynchronous Counter). Rev D Document (5/2006) Removed issue 34 (Timer1). Added Example 4 in issue 23 (Interrupts). Added issues 34-37 (EUSART), 38 (Timer1), 39-42 (MSSP), and 43 (Reset). Added Date Code information to new issues from revision C (issues 24-33). © 2006 Microchip Technology Inc. PIC18F2525/2620/4525/4620 DS80200D-page 15 ...

Page 16

... PIC18F2525/2620/4525/4620 NOTES: DS80200D-page 16 © 2006 Microchip Technology Inc. ...

Page 17

... PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 18

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2006 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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