PIC16F877A-I/P Microchip Technology, PIC16F877A-I/P Datasheet - Page 349

IC MCU FLASH 8KX14 EE 40DIP

PIC16F877A-I/P

Manufacturer Part Number
PIC16F877A-I/P
Description
IC MCU FLASH 8KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F877A-I/P

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
CCP/I2C/MSSP/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC16F877AI/P

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18.4.3
18.4.3.1
1997 Microchip Technology Inc.
(RX/DT pin)
(RX/DT pin)
baud CLK
baud CLK
Sampling
Device Exceptions
x16 CLK
x16 CLK
RX
RX
The data on the RX/DT pin is sampled three times by a majority detect circuit to determine if a
high or a low level is present at the RX pin.
circuit. The sampling operates the same regardless of the state of the BRGH bit, only the source
of the x16 clock is different.
Figure 18-6:
All new devices will use the sampling scheme shown in
tion to the above sampling scheme are:
• PIC16C63
• PIC16C65
• PIC16C65A
• PIC16C73
• PIC16C73A
• PIC16C74
• PIC16C74A
These devices have a sampling circuitry that works as follows. If the BRGH bit (TXSTA<2>) is
clear (i.e., at the low baud rates), the sampling is done on the seventh, eighth and ninth falling
edges of a x16 clock
is done on the 3 clock edges preceding the second rising edge after the first falling edge of a x4
clock
Figure 18-7:
1
1
(Figure 18-8
2
2
3
3
4
4
RX Pin Sampling Scheme, BRGH = 0 or BRGH = 1
RX Pin Sampling Scheme (BRGH = 0)
and
(Figure
5
5
Figure
6
6
18-7). If bit BRGH is set (i.e., at the high baud rates), the sampling
18-9).
7
7
Samples
Samples
8
8
9
9
Start bit
Start bit
Figure 18-6
10
10
Section 18. USART
11
11
Baud CLK for all but start bit
Baud CLK for all but start bit
12
12
Figure
shows the waveform for the sampling
13
13
18-6. Devices that have an excep-
14
14
15
15
16
16
DS31018A-page 18-13
1
1
2
2
Bit0
Bit0
3
3
18

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