PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 8

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
FIGURE 2-8:
2.5
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC and are Least Significant bit (LSb)
first.
2.5.1
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand, which
depends on the type of command being executed. To
input a command, PGC is cycled four times. The
commands needed for programming and verification
are shown in Table 2-3.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data or 8 bits of input data
and 8 bits of output data.
FIGURE 2-9:
DS39688D-page 8
PGC
PGD
MCLR
V
PGD
PGC
DD
Serial Program/Verify Operation
4-BIT COMMANDS
P3
4-Bit Command
1
P2
1
2
P4
0
PGD = Input
EXITING PROGRAM/
VERIFY MODE
TABLE WRITE, POST-INCREMENT TIMING (1101)
3
1
V
4
P16
1
IH
P2A
P5
P2B
1
V
0
IH
2
0
0
3
0
4
0
5
0
6
PGD = Input
0
16-Bit Data Payload
4
7
1
8
0
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit
command is shown Most Significant bit (MSb) first. The
command operand, or “Data Payload”, is shown
<MSB><LSB>. Figure 2-9 demonstrates how to
serially present a 20-bit command/operand to the
device.
2.5.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers as appropriate for use with other commands.
TABLE 2-3:
TABLE 2-4:
9
Core Instruction
(Shift in 16-bit instruction)
Shift Out TABLAT Register
Table Read
Table Read, Post-Increment
Table Read, Post-Decrement
Table Read, Pre-Increment
Table Write
Table Write, Post-Increment by 2
Table Write, Start Programming,
Post-Increment by 2
Table Write, Start Programming
0
Command
10
1101
4-Bit
0
C
11
1
12
1
CORE INSTRUCTION
13
Description
Payload
3C 40
1
Data
14
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
1
3
15
0
© 2009 Microchip Technology Inc.
16
Table Write,
post-increment by 2
0
P5A
Fetch Next 4-Bit Command
Core Instruction
1
n
2
n
3
n
Command
4
n
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit