PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 3

IC PIC MCU FLASH 65KX16 100TQFP

PIC18F97J60-I/PF

Manufacturer Part Number
PIC18F97J60-I/PF
Description
IC PIC MCU FLASH 65KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F97J60-I/PF

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
100TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
41.667 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1. Asynchronous Counter
EXAMPLE 1:
 2010 Microchip Technology Inc.
Update:
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
When Timer1 is started or updated, the timer
needs to see a falling edge from the external clock
source before a rising edge can increment the
counter. If writes to TMR1H and TMR1L are not
completed while the external clock pulse is still
high, Timer1 will miss counting the first clock pulse
after the update.
When using an external crystal, the pulse width
from rising to falling edge is temperature depen-
dent and may decrease with temperature. As a
result, the timer may require an additional oscilla-
tion to overflow.
Code examples are given for the affected devices:
• PIC12/14/16/17 devices – Example 1 and
• PIC18 devices – Example 3
Both examples include code to wait for Timer1 to
increment twice between the RTCisr and Update
labels.
BTFSC
GOTO
BTFSS
GOTO
BCF
BSF
BCF
BSF
BSF
Example 2
TMR1L,0
$-1
TMR1L,0
$-1
T1CON,TMR1CS
TMR1H,7
T1CON,TMR1ON
T1CON,TMR1C
T1CON,TMR1ON
PIC12/14/16/17 CODE EXAMPLE FOR 1 SECOND OVERFLOW PERIOD WITH 32.786
kHZ OSCILLATOR
;Timer has just incremented, 31 μs before next rising edge to
;complete reload
;Select system clock for Timer1
;Timer1 high byte 0x80
;Timer1 off
;Select external crystal
;Timer1 on
In PIC18 devices, it is not possible to reliably
update Timer1 in a low-priority interrupt. A high-
priority interrupt could occur at any time and
unexpectedly delay the TMR1 update.
PIC18 devices also include Timer3 which is
functionally identical to Timer1.
Work around
Switching Timer1 to the main system oscillator
after reloading, the timer ensures the timer will see
a falling edge before switching back to the external
clock source.
Due to the time from Timer1 overflow to the reload
being application specific, wait for the timer to
increment before beginning the reload sequence.
This ensures the timer does not miss a rising edge
during reload. The timing of the clock source
changing is critical and is detailed in Example 1
and Example 2.
TIMER1 MODULE
DS80329B-page 3

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