DSPIC33FJ64GP706-I/PT Microchip Technology, DSPIC33FJ64GP706-I/PT Datasheet - Page 45

• Manufacturer Part Number: DSPIC33FJ64GP706-I/PT
• Description: IC DSPIC MCU/DSP 64K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP706-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.8
Reading from code memory is performed by executing
a series of TBLRD instructions and clocking out the data
using the REGOUT command.
Table 5-8
reading code memory. In Step 1, the Reset vector is
exited. In Step 2, the 24-bit starting source address for
reading is loaded into the TBLPAG register and W6
register. The upper byte of the starting source address
is stored in TBLPAG and the lower 16 bits of the source
address are stored in W6.
TABLE 5-8:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Reading Code Memory
shows the ICSP programming details for
SERIAL INSTRUCTION EXECUTION FOR READING CODE MEMORY
040200
040200
000000
200xx0
880190
2xxxx6
EB0380
000000
BA1B96
000000
000000
BADBB6
000000
000000
BADBD6
000000
000000
BA1BB6
000000
000000
BA1B96
000000
000000
BADBB6
000000
000000
BADBD6
000000
000000
BA0BB6
000000
000000
(Hex)
Data
GOTO
GOTO
NOP
MOV
MOV
MOV
CLR
NOP
TBLRDL
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDL
NOP
NOP
TBLRDL
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDH.B
NOP
NOP
TBLRDL
NOP
NOP
0x200
#<SourceAddress23:16>, W0
W0, TBLPAG
#<SourceAddress15:0>, W6
0x200
W7
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7++]
[W6], [W7++]
[W6++], [W7++]
[++W6], [W7++]
[W6++], [W7]
To minimize the reading time, the packed instruction
word format that was utilized for writing is also used for
reading (see
W7, is initialized. In Step 4, two instruction words are
read from code memory and clocked out of the device,
through the VISI register, using the REGOUT command.
Step 4 is repeated until the desired amount of code
memory is read.
Description
Figure
5-7). In Step 3, the write pointer,
DS70152H-page 45