PIC18C442-I/P Microchip Technology, PIC18C442-I/P Datasheet

PIC18C442-I/P

Manufacturer Part Number

PIC18C442-I/P

Description

IC MCU OTP 8KX16 A/D 40DIP

Manufacturer

Microchip Technology

Series

PIC® 18Cr

Datasheets

1.PIC16F616T-ISL.pdf (8 pages)

2.PIC16C770-ISO.pdf (8 pages)

3.PIC18C242-ISO.pdf (305 pages)

4.PIC18C242-ISO.pdf (12 pages)

Specifications of PIC18C442-I/P

Core Size

8-Bit

Program Memory Size

16KB (8K x 16)

Peripherals

Brown-out Detect/Reset, LVD, POR, PWM, WDT

Core Processor

PIC

Speed

40MHz

Connectivity

I²C, SPI, UART/USART

Number Of I /o

Program Memory Type

OTP

Ram Size

512 x 8

Voltage - Supply (vcc/vdd)

4.2 V ~ 5.5 V

Data Converters

A/D 8x10b

Oscillator Type

External

Operating Temperature

-40°C ~ 85°C

Package / Case

40-DIP (0.600", 15.24mm)

Controller Family/series

PIC18

No. Of I/o's

Ram Memory Size

512Byte

Cpu Speed

40MHz

No. Of Timers

Processor Series

PIC18C

Core

PIC

Data Bus Width

8 bit

Data Ram Size

512 B

Interface Type

MSSP, SPI, I2C, PSP, USART

Maximum Clock Frequency

40 MHz

Number Of Programmable I/os

Number Of Timers

1 x 16 bit

Operating Supply Voltage

2.5 V to 5.5 V

Maximum Operating Temperature

+ 85 C

Mounting Style

Through Hole

3rd Party Development Tools

52715-96, 52716-328, 52717-734, 52712-325, EWPIC18

Development Tools By Supplier

ICE2000, DM163022, DV164136

Minimum Operating Temperature

- 40 C

On-chip Adc

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With

I3DB18C452 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU

Eeprom Size

Lead Free Status / Rohs Status

Details

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

PIC18C442-I/P

Manufacturer:

Microchip

Quantity:

731

Company:

BOSTOCK HK LIMITED

Part Number:

PIC18C442-I/PT

Manufacturer:

Microchip Technology

Quantity:

10 000

Current page: 1 of 12
Download datasheet (186Kb)

The PIC18CXX2 (Rev. B) parts you have received con-

form

(DS39026C), except for the anomalies described

below.

All the problems listed here will be addressed in future

revisions of the PIC18CXX2 silicon.

1. Module: CPU

EXAMPLE 1:

EXAMPLE 2:

 2002 Microchip Technology Inc.

;

; Optionally save the WREG register

;

; Optionally restore the WREG register

;

Note:

Using the LFSR instruction to load a value into the

specified FSR register, may also corrupt a RAM

location.

Work around

Do not use the LFSR instruction. The use of MOVLW

and MOVWF instructions can be implemented to

load the FSR registers. The WREG register may

need to be saved before these operations and

restored afterwards.

LFSR

MOVLW

MOVWF

MOVLW

MOVWF

functionally

As with any windowed EPROM device, please cover the window at all times, except when erasing.

PIC18CXX2 Rev. B Silicon/Data Sheet Errata

FSR1, Pointer

HIGH (Pointer)

FSR1H

LOW (Pointer)

FSR1L

DEFINED OPERATION

WORK AROUND

the

Device

Data

Sheet

2. Module: CCP

3. Module: Oscillator

Note:

When

Compare

(CCPxCON = b’00xx0010’), unexpected pin

operation may be observed.

When the timer used for the CCP module time-

base is configured to have a prescale ratio greater

than 1:1, the output on the CCP pin will toggle the

prescaled number of times for each compare

match. That is, for a n:1 timer prescale ratio, the

CCP output pin will toggle n times at each com-

pare match. The toggle occurs each instruction

cycle (T

Work around

The prescale ratio for the timer used as the CCP

module time-base must be 1:1. If a longer com-

pare time is needed, the timer must be running in

Timer mode or Synchronized Counter mode

(external clock source).

Date Codes that pertain to this issue:

In-Circuit Serial Programming

become unpredictable when a free-running clock

source is present on OSC1.

When entering ICSP mode, the PIC18C452

switches from OSC1 to RB6 for its external clock

source. Refer to the PIC18CXXX Programming

Specification (DS39028) for additional information.

If OSC1 is high at the time, a high-to-low transition

occurs upon the transition to RB6.The ICSP logic

interprets this as a clock, and advances the inter-

nal clock logic to Q2. This causes an unrecover-

able mismatch between ICSP logic and the clock.

Work around

Before entering ICSP mode, OSC1 must be driven

to and held in a low state. This must occur before

changing states on MCLR/V

PIC18CXX2

ALL

When the manufacture date of a newer

version of silicon is in production, the last

date where this issue may occur, will be

specified.

the

CCP

mode

module

toggle

, RB6 and RB7.

DS80058H-page 1

configured

(ICSP

output

) may

Related parts for PIC18C442-I/P

PIC18C442-I/P Summary of contents

Page 1

... LOW (Pointer) MOVWF FSR1L ; ; Optionally restore the WREG register ; Note: As with any windowed EPROM device, please cover the window at all times, except when erasing.  2002 Microchip Technology Inc. PIC18CXX2 2. Module: CCP Data Sheet When the Compare (CCPxCON = b’00xx0010’), unexpected pin operation may be observed ...

Page 2

... Access Banking is not possible, consider using indirect addressing pointing the BSR to Bank 15 is unavoidable, review the absolute file listing. Verify that no instructions contains 83h in the 8 Least Signif- icant bits while the BSR points to Bank 15 (BSR = 0Fh).  2002 Microchip Technology Inc. ...

Page 3

... If pointing the BSR to Bank 15 is unavoidable, review the absolute file listing. Verify that no instruction contains C9h in the 8 Least Significant bits while BSR points to Bank 15 (BSR = 0Fh).  2002 Microchip Technology Inc. PIC18CXX2 8. Module: Interrupts High priority interrupts may become improperly enabled, while low priority interrupts become improperly disabled at the same time ...

Page 4

... GIE interrupt priority is being used: a) clear both GIEL and GIEH (in order) bits (INTCON<7:6>) to disable all peripheral interrupts b) clear the desired interrupt enable bits c) set both GIEH and GIEL, in order to re-enable peripheral interrupts  2002 Microchip Technology Inc. the GIE bit ...

Page 5

... No D420 V Low Voltage LVD Detect  2002 Microchip Technology Inc. 3. Module: Timer1 Section 11.1 (Timer1 Operation) is amended with the following clarification: When Timer1 is configured to operate as an asyn- chronous counter, care must be taken that there is no incoming pulse while the module is being turned off ...

Page 6

... EC, ECIO (Industrial) 40 — ns EC, ECIO (Extended) 250 — osc (Industrial, Extended) 250 — osc (Industrial, Extended) 25 — osc (Industrial) 40 — osc (Extended) 100 250 PLL osc (Industrial) 160 250 PLL osc (Extended) µs 5 — LP osc (Industrial)  2002 Microchip Technology Inc. Conditions ...

Page 7

... Device Data Sheet: FIGURE 21-3: PIC18CXX2 VOLTAGE-FREQUENCY GRAPH (EXTENDED) 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V In addition, the title of Figure 21-1 is amended to read: “PIC18CXX2 Voltage-Frequency Graph (Industrial)”  2002 Microchip Technology Inc. PIC18CXX2-E 25 MHz Frequency PIC18CXX2 4.2V DS80058H-page 7 ...

Page 8

... Device Data Sheet is amended with the addition of a GIE/GIEH control line, as shown in Figure 1 (new material in bold line). TMR0IF TMR0IE TMR0IP RBIF RBIE RBIP GIEL/PEIE GIE/GEIH INT1IF INT1IE INT1IP INT2IF INT2IE INT2IP  2002 Microchip Technology Inc. Interrupt to CPU Vector to Location 0018h ...

Page 9

... PIR1,TXIF ;second instruction-- ;now TXIF is valid EXAMPLE 2: POLLING THE TXIF BIT IMMEDIATELY AFTER LOADING THE TRANSMIT BUFFER movwf TXREG ;load the register btfss PIR1,TXIF ;first instruction-- ;reading TXIF now will ;give invalid results  2002 Microchip Technology Inc. PIC18CXX2 DS80058H-page 9 ...

Page 10

... Rev C Document Added ICSP issue (page 1, issue 3). Added CCP (Compare mode) issue (page 2, issue 4). Added Timer issue (page 2, issue 5). Rev B Document Added CCP silicon issue (page 1, issue 2). Rev A Document 1st revision of this document. DS80058H-page 10  2002 Microchip Technology Inc. ...

Page 11

... Serialized Quick Term Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...

Page 12

... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...

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