PIC18F4220-I/PT Microchip Technology, PIC18F4220-I/PT Datasheet - Page 20

• Manufacturer Part Number: PIC18F4220-I/PT
• Description: IC MCU FLASH 2KX16 A/D 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4220-I/PT

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 512 B
• Data Rom Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 36
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 13
• Height: 1 mm
• Interface Type: SPI, I2C, USART
• Length: 10 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details

PIC18FX220/X320
4.0
4.1
Data EEPROM is accessed one byte at a time via an
Address Pointer, EEADR, and a Data Latch, EEDATA.
Data EEPROM is read by loading EEADR with the
desired memory location and initiating a memory read
by appropriately configuring the EECON1 register. The
data will be loaded into EEDATA, where it may be
serially output on PGD via the 4-bit command, ‘0010’
(Shift Out Data Holding register). A delay of P6 must be
introduced after the falling edge of the 8th PGC of the
operand to allow PGD to transition from an input to an
output. During this time, PGC must be held low (see
Figure 4-2).
The command sequence to read a single byte of data
is shown in Table 4-1.
TABLE 4-1:
FIGURE 4-2:
DS39592F-page 20
Step 1: Direct access to data EEPROM.
Step 2: Set the data EEPROM Address Pointer.
Step 3: Initiate a memory read.
Step 4: Load data into the Serial Data Holding register.
Note 1:
Command
PGC
PGD
0000
0000
0000
0000
0000
0000
0000
0010
4-Bit
READING THE DEVICE
Read Data EEPROM Memory
The <LSB> is undefined. The <MSB> is the data.
1
0
2
1
9E A6
9C A6
0E <Addr>
6E A9
80 A6
50 A8
6E F5
<LSB><MSB>
READ DATA EEPROM MEMORY
3
0
SHIFT OUT DATA HOLDING REGISTER TIMING (
Data Payload
4
0
P5
PGD = Input
1
2
3
4
BCF
BCF
MOVLW <Addr>
MOVWF EEADR
BSF
MOVF
MOVWF TABLAT
Shift Out Data
5
6
EECON1, EEPGD
EECON1, CFGS
EECON1, RD
EEDATA, W, 0
7
8
P6
(1)
9
LSb
FIGURE 4-1:
P14
10 11
1
2
PGD = Output
Core Instruction
12
Shift Data Out
3
13
4
No
0010
14
5
15 16
Move to TABLAT
6
Shift Out Data
)
READ DATA EEPROM
FLOW
 2010 Microchip Technology Inc.
Address
Done?
Read
Done
Start
MSb
Byte
Set
P5A
Yes
Fetch Next 4-Bit Command
1
n
PGD = Input
2
n
3
n
4
n